DRAM Refresh Management System for Row Hammer Mitigation

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Solution Overview

Problem

In semiconductor memory devices, particularly DRAM, the increased density of memory cells leads to the 'row hammer' effect, where repeated access to a row of memory cells causes accelerated data degradation in adjacent cells, necessitating targeted refresh operations that can interfere with background auto-refresh cycles, and external commands may trigger additional refresh operations that are not always necessary, potentially diminishing performance.

Innovation Solution

Implementing a refresh management system that monitors the frequency of row addresses to determine if they are associated with aggressor rows, using a high-pass filter to identify rows that require additional refresh operations, and skipping unnecessary refresh management (RFM) operations based on access patterns to prevent secondary row hammer effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If targeted refresh operations are performed to address row hammer effects, then data degradation in adjacent memory cells is reduced, but background auto-refresh operations are interfered with and performance diminishes

Engineering Contradiction:
Improvedata integrityVSAvoidmemory access speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically changes the refresh operation parameters by selectively skipping RFM refreshes based on monitored access patterns. When access frequency falls below a threshold, the refresh behavior changes from performing targeted refreshes to skipping them, thus adapting the reliability-performance balance based on actual usage conditions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements feedback by monitoring row access patterns and using this information to control whether RFM refresh operations are performed or skipped. The monitor detects access frequency and provides feedback to the refresh control logic, which adjusts refresh behavior accordingly - this closed-loop control resolves the contradiction by making refresh operations conditional on actual row hammer risk

Inventive Principle:
Principle #23Feedback

2Reliability

If refresh management operations are performed responsive to external commands, then additional refresh coverage is provided, but unnecessary refresh operations diminish performance

Engineering Contradiction:
Improvedata freshnessVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system changes the operational parameter of refresh execution from unconditional to conditional based on access pattern monitoring. External commands trigger RFM refreshes only when the monitor detects that access frequency exceeds the threshold, transforming the refresh behavior from always-executing to selectively-executing based on measured conditions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of performing full RFM refresh operations for every external command, the system applies partial action by skipping refreshes when access patterns indicate low risk. This prevents excessive refresh operations while still providing adequate refresh coverage when needed, optimizing the balance between data freshness and operational efficiency

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11417384B2Apparatuses and methods for control of refresh operations
Publication Date: 2022.08.16 MICRON TECHNOLOGY INC
  • US11417384B2 patent drawing
  • US11417384B2 patent drawing
  • US11417384B2 patent drawing

AI summary

In some examples, a memory device may perform refresh operations responsive to internal and/or external commands. internal refresh commands may include auto-refresh commands and row hammer (e.g., targeted) refresh commands. External commands may include refresh management commands. In some examples, the external command may cause a refresh operation to occur after a number of activation commands. The memory device may monitor row addresses associated with the activation commands. In some examples, the memory device may skip a refresh operation indicated by a refresh management command if none of the row addresses associated with the activation commands occurs at a high frequency. In some examples, row addresses may be determined to be aggressor row addresses if a received row address matches a previously received row address.