Logic Circuit for Server Drive Interruption Signal Verification

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Solution Overview

Problem

High-availability server systems face challenges in ensuring error-free control of data storage drives due to the lack of intrinsic error detection mechanisms in serial communication buses like I2C, which can lead to system interruptions or failures when erroneous signals inadvertently power down drives.

Innovation Solution

Implementing a gated decision loop with logic circuits that pre-qualify device turn-off commands through the approval of both controllers, using a logical OR gate or similar mechanism to ensure that signals from all serial data busses agree before affecting the state of the drives, thereby minimizing the risk of errors and system failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If serial communication buses like I2C are used to control data storage drives, then pin count on connectors is reduced and thermal performance improves, but error detection mechanisms are lacking leading to system interruptions or failures

Engineering Contradiction:
Improvepin countVSAvoiderror detection capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A logic circuit is introduced as an intermediary component between the serial communication bus and the data storage drive. This logic circuit receives control signals from the bus, performs verification logic to detect errors, and then controls the drive. The intermediary adds error detection capability without requiring changes to the serial bus protocol or increasing pin count.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If redundant controllers are implemented to provide failover capability, then system availability improves, but the complexity of signal coordination and error detection increases

Engineering Contradiction:
Improvesystem availabilityVSAvoidsignal coordination complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The verification logic from multiple controllers is merged into a single logic circuit associated with each drive. Instead of each controller independently managing error detection and signal coordination, the controllers work together by having their control signals converge at the logic circuit, which performs unified verification and drive control.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If logic circuits with verification logic are added to each drive, then error detection capability improves, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error detection and control function is segmented from the main controller logic and placed at the drive level. Each drive has its own logic circuit that handles verification and control, independent of the controllers. This segmentation distributes the complexity across multiple simple components rather than concentrating it in complex controller logic.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10558598B2Logic circuit that provides verification of signals used to interrupt server operation
Publication Date: 2020.02.11 SEAGATE TECH LLC
  • US10558598B2 patent drawing
  • US10558598B2 patent drawing
  • US10558598B2 patent drawing

AI summary

Based on a command to interrupt operation of a selected one or more of a plurality of data storage drives coupled to two or more storage controllers, two or more signals are sent from the two or more storage controllers via two or more data busses associated with and coupled to the respective two or more controllers. The selected data storage drive receives the two or more signals via the two or more data busses. Based on determining that the two or more signals agree, the operation of the selected drive is interrupted.