Driver Slew Rate Calibration Using Phase Rotators for Timing Skew

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Solution Overview

Problem

In data processing systems, especially those with high clock rates and large memory modules, timing skew variations pose challenges for memory controllers, requiring effective calibration to adapt to system implementation irregularities and ensure accurate timing.

Innovation Solution

A multi-protocol driver slew rate calibration system that uses phase rotators and a calibration controller to generate and adjust clock signals, calibrating control signals for driver clock delay lines to match target slew rates, ensuring accurate timing across different system configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If memory controllers are configured to calibrate themselves during power-on initialization, then timing skew accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvetiming skew accuracyVSAvoidcalibration system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The memory controller performs self-calibration during power-on initialization without requiring external calibration equipment. The calibration controller generates test signals, measures timing skew through phase rotators, and automatically adjusts delay values to compensate for system variations, enabling the system to calibrate itself independently.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The calibration system uses feedback loops where the calibration controller measures actual timing skew through phase rotation comparisons and adjusts delay line settings accordingly. The system continuously monitors timing parameters and modifies control signals to minimize timing skew, creating a closed-loop calibration process.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If phase rotators are used to generate delayed clock signals for calibration, then timing measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvetiming measurement precisionVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The calibration system divides the timing measurement function into separate phase rotator modules, each responsible for specific phase shifts. This segmentation allows independent optimization of each rotator and enables modular calibration of different timing parameters without affecting the entire system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The phase rotators serve multiple functions: they generate test signals for calibration, measure timing skew, and provide delayed clock signals for comparison. This multi-functionality reduces the need for separate dedicated measurement circuits, thereby reducing overall device complexity while maintaining measurement precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8692600B1Multi-protocol driver slew rate calibration system for calibration slew rate control signal values
Publication Date: 2014.04.08 MARVELL ASIA PTE LTD
  • US8692600B1 patent drawing
  • US8692600B1 patent drawing
  • US8692600B1 patent drawing

AI summary

Multi-protocol driver slew rate calibration systems for calibrating slew rate control signal values are provided. Embodiments include generating, by a first phase rotator, a first clock signal; generating, by the second phase rotator, a second clock signal; initially setting, by a calibration controller, phase selector amounts such that the first clock signal is delayed relative to the second clock signal; determining whether the first clock signal is delayed relative to the second clock signal; if the first clock signal is delayed, changing the second phase selector amount; and if the first clock signal is not delayed, using the first clock signal and the second clock signal to calibrate values of control signals provided to control a slew rate of a calibration clock delay line such that the slew rate of the calibration clock delay line substantially matches a target slew rate.