DSP Timing Extraction for IP Network Synchronization

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Solution Overview

Problem

Traditional port networks and media gateways in IP networks face challenges in synchronization without external timing sources, as they cannot interface with Center Stage Switches, and relying on NTP or GPS requires hardware and software development, making it costly and complex.

Innovation Solution

The solution involves deriving timing from the PSTN and distributing it through the network using UDP streams, allowing gateways to synchronize internally without external timing sources or hardware, using digital signal processors to manage and distribute timing for voice telephony and Circuit Emulated Services.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If reference boards are installed in all port networks or media gateways to achieve system-wide synchronization, then synchronization reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the timing extraction function from dedicated reference boards and implements it within the DSP using firmware. The DSP derives timing signals from incoming IP packets without requiring external reference hardware, thus removing the need for reference boards while maintaining synchronization capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The DSP is made multi-functional by enabling it to both process voice packets and derive timing signals from the same incoming stream. This universal approach allows a single component to perform multiple functions, eliminating the need for separate reference boards in each gateway

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If NTP or SNTP protocols are used for network timing, then timing distribution capability is improved, but hardware and software development requirements increase complexity

Engineering Contradiction:
Improvetiming distribution capabilityVSAvoidhardware and software development
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system performs self-service timing by having the DSP automatically derive timing signals from incoming IP packets containing embedded timing information. This self-sufficient approach eliminates the need for external NTP/SNTP servers and reduces software development complexity while maintaining timing distribution capability

Inventive Principle:
Principle #25Self-service

3Measurement precision

If GPS receivers are used for maintaining synchronization, then timing precision is improved, but hardware requirements and development effort increase

Engineering Contradiction:
Improvetiming precisionVSAvoidhardware and software development
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces expensive GPS receivers with a cheaper, software-based timing extraction mechanism that derives precision timing from standard IP packets. This approach achieves comparable timing precision without requiring specialized GPS hardware or associated development effort

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Manufacturing precision

If dedicated reference boards are used in each gateway, then synchronization accuracy is improved, but cost and device complexity increase

Engineering Contradiction:
Improvesynchronization accuracyVSAvoiddevice complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the timing extraction function with the existing DSP voice processing function. By combining these functions in a single component, the system achieves synchronization accuracy without requiring separate reference boards, thus reducing device complexity and cost while maintaining precision

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8238377B2Network synchronization over IP networks
Publication Date: 2012.08.07 AVAYA INC
  • US8238377B2 patent drawing
  • US8238377B2 patent drawing
  • US8238377B2 patent drawing

AI summary

Network timing is derived from the PSTN and distributed through the network to gateways capable of deriving timing from the incoming UDP stream. The derived timing has the correct frequency for voice telephony without using external timing sources or extraneous hardware components. For example, a digital signal processor (DSP) can derive the timing from a timed TDM bus and distribute messages, such as IP messages, to other gateways or port networks. The other gateways and port networks use the incoming stream to extract the timing which is then used to time their TDM bus. The port networks and gateways can also distribute other streams to other gateways in a fan-out type of arrangement. This internally generated timing can be used, for example, for Circuit Emulated Services (CES).