Data Speculation Extension Hardware for Vector Loop Safety
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Solution Overview
Problem
Vectorizing loops with possible cross-iteration dependences is challenging due to the difficulty in ensuring safe execution without expensive hardware-based address checks, particularly in speculative execution scenarios where ordering violations can lead to incorrect execution.
Innovation Solution
The introduction of Data Speculation Extension (DSX) hardware and new speculative instructions that allow software to assist hardware in address checking, using a stride and loop position information to reconstruct scalar memory ordering and detect mis-speculation, thereby enabling cheaper and more efficient vectorization without impacting execution time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware-based address checks are implemented to ensure safe vectorized execution, then execution safety is improved, but hardware complexity and cost increase
Solution Approach 1:
The patent introduces an intermediary mechanism where the compiler generates metadata (stride and loop position information) that assists the hardware in performing address checks. This metadata acts as a mediator between the compiler and hardware, enabling safer vectorized execution without requiring complex hardware-based address checking mechanisms. The hardware uses this pre-computed information to verify address ordering violations, thus improving execution safety while keeping hardware complexity manageable.
2Productivity
If compiler generates vectorized code without address checking, then execution speed is improved, but execution safety deteriorates
Solution Approach 1:
The patent applies preliminary action by having the compiler pre-compute and embed metadata (stride and loop position information) into the generated code before execution. This preliminary computation enables the hardware to perform fast address checking during vectorized execution without compromising safety. The compiler's advance preparation allows the hardware to quickly verify address ordering using the provided metadata, thus maintaining both execution speed and safety.
3Device complexity
If software assists hardware in address checking, then device complexity is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent changes the parameters used for address checking by utilizing compiler-generated metadata (stride and loop position information) instead of requiring complex hardware to compute these values during execution. This parameter change shifts the computational burden to the compiler phase, simplifying the hardware's role to verifying address ordering against the provided metadata. The precision requirements are managed through the compiler's accurate computation of stride and position information, rather than hardware precision constraints.
Data Source
AI summary
Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for performing DSX comprises a hardware decoder to decode an instruction, the instruction to include an opcode, and execution hardware to execute the decoded instruction to reset data speculative execution (DSX) tracking hardware to track speculative memory accesses, clear a DSX status indication in a DSX status register, and commit all speculatively executed stores of the DSX region and thereby end a DSX region.