Digital Time Processing for TSN Phase Noise Reduction
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Solution Overview
Problem
Existing IEEE 1588 implementations face limitations in time distribution accuracy due to conventional time filtering methods and circuits, which are affected by link asymmetry errors and require offline knowledge of link parameters.
Innovation Solution
The proposed Digital Time Processing (DTP) system uses a time to digital converter (TDC), a rational number filter (RNF), and a digital to time converter (DTC) to measure and filter timing signals, preventing quantization errors through open or closed loop phase control systems, and reduces phase noise in phase tracking systems using rational numbers and integer arithmetic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional time filtering methods are used in IEEE 1588 implementations, then time distribution can be achieved, but time distribution accuracy is limited due to quantization errors and link asymmetry errors
Solution Approach 1:
The patent segments the time interval measurement into multiple sub-intervals measured by different TDC circuits, each with its own free-running clock. By measuring the same time interval through multiple independent paths and combining the results, the system achieves higher accuracy while eliminating quantization errors that would accumulate in a single measurement path.
Solution Approach 2:
The patent introduces rational number filters as intermediary processing elements between the TDC measurements and the final time distribution output. These filters use rational number arithmetic to process the measured intervals, preventing quantization error accumulation while maintaining the beneficial effects of multiple measurement paths.
2Reliability
If conventional voltage-controlled oscillators are used for phase tracking, then phase noise reduction can be achieved, but system cost increases significantly
Solution Approach 1:
The patent replaces expensive voltage-controlled oscillators with inexpensive free-running clocks that do not require costly control circuits. The system achieves phase tracking and noise reduction through digital processing of multiple low-cost clock measurements, eliminating the need for expensive analog phase-locked loop components while maintaining or improving phase noise immunity.
Solution Approach 2:
The patent substitutes analog mechanical phase-locked loop systems with digital time measurement and processing systems. Instead of using analog VCOs and phase detectors, the system uses digital TDC circuits to measure time intervals and rational number filters to process the measurements, achieving the same phase tracking function with superior accuracy and lower cost.
3Measurement precision
If single-path time measurement is used, then device complexity is reduced, but time distribution accuracy is limited by quantization errors
Solution Approach 1:
The patent divides the time measurement function into multiple parallel TDC measurement paths, each measuring the same time interval independently. By segmenting the measurement task across multiple independent circuits with free-running clocks, the system achieves higher accuracy through diversity without requiring a single complex high-precision measurement path.
Solution Approach 2:
The patent combines the results from multiple independent TDC measurement paths through rational number filter processing. By merging the measurements in the digital domain using rational number arithmetic, the system achieves accuracy equivalent to or better than a single complex measurement path while keeping each individual measurement path relatively simple.
Data Source
AI summary
The Digital Time Processing over Time Sensitive Networks (DTP TSN) disclosed herein is contributing methods, systems and circuits for using a Precision Time Protocol (PTP) such as IEEE 1588 for distributing a master time secured by a master unit to slave units by utilizing slave clocks recovered from PTP messages and/or compatible with them data receiver clocks for maintaining a local slave time which is increased to a local master time by adding to it an estimate of a transmission delay derived by processing PTP messages, wherein such distribution of the master time includes filtering out phase noise of a timing referencing signals communicated by PTP messages in order to produce accurate timing implementing signals such as the slave clock, local slave time and local master time.