Dual Capping Structure for Low-Dark-Current CMOS Image Sensors

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Solution Overview

Problem

CMOS image sensors face performance degradation due to dark current, which occurs at the interface between germanium epitaxial structures and silicon capping structures, leading to inaccurate signal generation even in the absence of incident radiation, particularly affecting time-of-flight sensors.

Innovation Solution

A second capping structure is introduced between the first capping structure and the epitaxial structure, comprising a group IV chemical element and a second chemical element with a different energy band gap, reducing the conduction and valence band discontinuities and thereby minimizing dark current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a silicon capping structure is used to cover the germanium epitaxial structure, then the device can be manufactured with standard CMOS processes, but dark current is generated at the interface due to band discontinuity

Engineering Contradiction:
ImprovemanufacturabilityVSAvoiddark current
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

A second capping structure comprising a group IV chemical element and a second chemical element is introduced as an intermediary layer between the silicon first capping structure and the germanium epitaxial structure. This intermediate layer reduces the conduction and valence band discontinuities at the interface, thereby minimizing dark current generation while maintaining compatibility with standard CMOS manufacturing processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The second capping structure is formed as a composite material combining a group IV chemical element (such as silicon or germanium) with a second chemical element, creating a material with tailored band structure properties that bridge the band gap between pure silicon and pure germanium, thus reducing interface band discontinuity and dark current.

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If the band discontinuity at the interface is reduced by introducing a second capping structure, then dark current is minimized, but the device complexity increases

Engineering Contradiction:
Improvedark currentVSAvoidstructure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The composition and band structure parameters of the capping structure are optimized by introducing a second chemical element combined with a group IV chemical element. This parameter adjustment creates a gradient in band energy levels that smoothly transitions between silicon and germanium, reducing dark current while keeping the additional structural complexity minimal and manageable.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The reduced dark current improves the performance of CMOS image sensors by ensuring accurate signal generation, enabling reliable time-of-flight measurements with dark current levels below 0.5 nanoamps, suitable for precise distance determination.

Implementation Method 1

reducing the conduction and valence band discontinuities and thereby minimizing dark current

Methodology Applied
Scientific EffectBand discontinuity reduction:

Data Source

PatentUS20240379724A1Capping structure to reduce dark current in image sensors
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240379724A1 patent drawing
  • US20240379724A1 patent drawing
  • US20240379724A1 patent drawing

AI summary

In some embodiments, a semiconductor device is provided. The semiconductor device includes an epitaxial structure disposed on a semiconductor substrate. A photodetector is disposed at least partially in the epitaxial structure. A first capping layer is disposed on the semiconductor substrate and covers the epitaxial structure. A second capping layer is disposed vertically between the first capping layer and the epitaxial structure. The first capping layer extends laterally past outermost sidewalls of the epitaxial structure and the second capping layer.