Dual-DAC Threshold Compensation for Asymmetrical Optical Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Optical noise asymmetry in optical fiber datalinks results in higher bit error rates for differential '1' bits due to smaller eye heights compared to '0' bits after optical-to-electrical conversion, necessitating adjustment of zero-crossing points to balance eye heights.
Innovation Solution
The implementation of a threshold adjustment circuit using two voltage-mode digital-to-analog converter (DAC) circuits at the optical receiver front end, which generates adjustment signals to pull up the zero-crossing point of positive data and pull down the zero-crossing point of negative data, while reducing power consumption by using high-value resistances and AC coupling capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If threshold adjustment is performed to balance eye heights of differential bits, then bit error rate decreases, but power consumption increases
Solution Approach 1:
The patent changes the resistance values in the DAC circuit to high-value resistances (e.g., 5kΩ or higher), which reduces the current consumption while maintaining the threshold adjustment capability. This parameter change allows the circuit to achieve the same functional effect with lower power consumption, directly resolving the contradiction between reliability improvement and energy usage.
Solution Approach 2:
The patent introduces AC coupling capacitances in series with the DAC output circuits, which block DC components and allow only AC signals to pass. This periodic action enables the threshold adjustment to be applied only when needed (during signal transitions) rather than continuously, reducing overall power consumption while maintaining bit error rate performance.
2Ease of operation
If voltage-mode DAC circuits are used for threshold adjustment, then zero-crossing points can be pulled up and down, but circuit complexity increases
Solution Approach 1:
The patent divides the threshold adjustment function into two separate DAC circuits, each handling one polarity (positive and negative). This segmentation allows independent optimization of each circuit and simplifies the control logic, as each DAC can be controlled separately to achieve the desired zero-crossing point adjustment without complex interactions.
Solution Approach 2:
The patent introduces AC coupling capacitances as intermediary elements between the DAC circuits and the output nodes. These capacitances mediate the interaction between the threshold adjustment signals and the differential signals, allowing the DAC circuits to operate independently while still achieving the desired effect on the overall signal. This intermediary approach reduces the complexity of direct coupling between multiple active circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption to less than 1 mA while balancing the eye heights of differential bits, thereby decreasing the bit error rate for optical data signals.
Implementation Method 1
an optical-to-electrical conversion circuit configured to produce first and second differential electrical data signals, at respective first and second electrical nodes, in response to an optical data signal
Data Source
AI summary
An optical data circuit includes threshold adjustment circuits to perform threshold adjustment compensation of asymmetrical optical noise. The optical data circuit includes an optical-to-electrical conversion circuit configured to produce first and second differential electrical data signals, at respective first and second electrical nodes, in response to an optical data signal. First and second digital-to-analog converter (DAC) circuits are each respectively coupled to the first and second electrical nodes and configured to respectively generate first and second adjustment signals. The first and second DAC circuits are configured to adjust the first and second differential electrical data signals such that a zero-crossing point of positive data is pulled up in response to the first adjustment signal and a zero-crossing point of negative data is pulled down in response to the second adjustment signal.