Transmission Control/Equlisation TRIZ Cases

Negative capacitance and LC resonant gain-peaking stages raise receiver bandwidth and gain without large bias current or device size increases.

Precharged PMOS and NMOS line-driver nodes block charge sharing, isolate leakage currents, and stabilize high-speed wireline links.

Analog voltage-controlled delay cells create UI-spaced equalizer taps without high-speed digital clocks, cutting power, area, and timing margin issues.

A summation circuit and active filter separate back-channel data on single-ended coax, avoiding replica circuits and lowering power.

Dual DAC threshold adjustment shifts differential zero-crossing points to balance eye heights, cut bit errors, and limit receiver power use.

Offset-based monitoring lets the receiver adapt AFE linearity correction during signal transmission, preserving signal quality as conditions change.

Uniform-width pulse trains distinguish control and data by sequence, cutting signal degradation, transmission time, and circuit complexity.

Active pull-up and pull-down elements replace passive resistor behavior in SENT buses to speed line transitions and improve transmission reliability.

A multi-path MOSFET equalizer keeps DC gain stable while boosting high-frequency peaking to cut inter-symbol interference and reject supply noise.

Two voltage-mode DACs shift positive and negative zero-crossing points to balance eye heights, lower bit errors, and keep receiver power low.

Discrete variable equalizer settings flatten frequency-dependent gain profiles to improve dynamic range and cut interference in wideband links.

A segmented OFDM preamble uses complementary sequences and even-carrier mapping to improve DVB-C2 synchronization, signaling, and channel estimation.

A gated equalization driver sharpens signal edges to reduce inter-symbol interference and extend high-speed line driver frequency response.

Fixed-width pulse train encoding preserves SPI clock, data, and control recognition under signal degradation while cutting filter complexity and transmission time.

Variable equalizers flatten gain slope and ripple across wideband links, improving dynamic range, weaker-signal detection, and power use.

Selectable inductor cells tune amplifier peaking gain to offset high-frequency channel loss while maintaining stable DC biasing.

Cross-coupled cascodes and inductive peaking raise CTLE high-frequency gain without larger devices, cutting extra amplification and power use.

Stepwise correction of frequency-domain filter factors speeds equalization setup while preserving filter accuracy in high-capacity communication processing.

A folding signal lets one adaptive equalizer shift bandwidth across cable lengths and data rates while reducing circuit complexity and power.

A passive equalizer combines filtered and direct signal paths in a sense amplifier to boost high frequencies while cutting power use and thermal noise.

Negative capacitance cancels parasitics in gain-peaking receiver stages, extending bandwidth and gain without large bias current or device size.

Adjustable equalizer settings flatten wideband frequency-dependent gain, improving dynamic range and lowering power use in wireless links.

Negative capacitance and LC resonant stages cancel parasitics, extending receiver gain-bandwidth without higher bias current.