Gain-Peaking Receiver Circuit With Negative Capacitance Bandwidth Boost

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Solution Overview

Problem

Conventional gain-peaking amplifiers for high-frequency applications face limitations in gain-bandwidth product, requiring significant increments in bias current and device size, and suffer from bandwidth reduction when cascaded, making them challenging for high-speed serial I/O designs due to severe transmission-line loss and signal reflections.

Innovation Solution

The implementation of a gain-peaking amplifier stage comprising a source-degenerative transconductance stage, a negative capacitance unit, and a trans-impedance stage with LC resonant circuits, which boosts gain by canceling parasitic capacitance and using a controlled current source with high output impedance, allowing for cascaded stages with improved gain-bandwidth response and reduced bandwidth reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional gain-peaking amplifiers are used for high-frequency applications, then gain-bandwidth product is limited, but increasing bias current and device size can improve gain

Engineering Contradiction:
Improvegain-bandwidth productVSAvoidbias current
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent changes the fundamental parameters of the amplifier by introducing a negative capacitance unit that transforms the output impedance characteristics. This allows the amplifier to achieve higher gain-bandwidth product without proportionally increasing bias current, as the negative capacitance compensates for parasitic effects and extends the useful bandwidth

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The negative capacitance unit acts as an intermediary element between the transconductance stage and the output load. It mediates the interaction between these stages by canceling parasitic capacitances and transforming impedance, thereby improving gain-bandwidth product without requiring proportional increases in bias current

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If conventional gain-peaking amplifiers are cascaded to achieve higher gain, then overall gain improves, but bandwidth reduction occurs

Engineering Contradiction:
ImprovegainVSAvoidbandwidth
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The patent converts the harmful effect of parasitic capacitances into a benefit by using negative capacitance to cancel them. This allows cascaded stages to maintain their bandwidth while achieving higher overall gain, as each stage's parasitic effects are compensated by the negative capacitance unit

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The introduction of negative capacitance fundamentally changes the frequency response parameters of each amplifier stage. This transformation allows cascaded stages to multiply their gain without the usual bandwidth penalty, as the negative capacitance compensates for the cumulative parasitic effects that would otherwise limit the cascaded system's bandwidth

Inventive Principle:
Principle #35Parameter changes

3Power

If device size is increased to improve gain performance, then gain increases, but device area and complexity increase

Engineering Contradiction:
ImprovegainVSAvoiddevice size
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent changes the effective output impedance parameter through negative capacitance, allowing smaller devices to achieve the same gain performance. By transforming the impedance characteristics rather than simply increasing device dimensions, the system achieves higher gain with reduced device area

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the gain-peaking performance, supports high-speed data rates, reduces power consumption, and provides flexible gain adjustment, while minimizing parasitic capacitance and improving AC performance, effectively addressing the limitations of conventional designs.

Implementation Method 1

a negative capacitance unit, and a trans-impedance stage with LC resonant circuits, which boosts gain by canceling parasitic capacitance

Methodology Applied
Scientific EffectNegative capacitance: Parasitic Capacitance

Implementation Method 2

a trans-impedance stage with LC resonant circuits, which boosts gain by canceling parasitic capacitance

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS9614697B2High speed receivers circuits and methods
Publication Date: 2017.04.04 INTEL CORP
  • US9614697B2 patent drawing
  • US9614697B2 patent drawing
  • US9614697B2 patent drawing

AI summary

The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided.