Signal Conversion Circuit Using Uniform Pulse Trains

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Solution Overview

Problem

Existing battery monitoring systems face challenges in signal degradation during transmission, leading to increased transmission time and higher costs due to the need for separate noise filters and waveform-shaping circuits for pulse signals with different pulse widths.

Innovation Solution

A signal conversion device that converts clock, data, and control signals into pulse trains with consistent pulse widths, allowing for easier recognition of successive pulses and reducing signal degradation, while consolidating noise filters and waveform-shaping circuits into a single type.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If pulse signals with different pulse widths are used to distinguish chip select and data signals, then signal conversion can be achieved, but transmission time increases and device complexity increases due to need for multiple noise filters and waveform-shaping circuits

Engineering Contradiction:
Improvedevice complexityVSAvoidtransmission time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent merges the distinction between chip select and data signals from pulse width modulation into a single pulse signal type. Both signals are transmitted as pulses of the same width, and the distinction is made through the sequence of pulses (successive pulses indicate chip select, single pulse indicates data). This eliminates the need for multiple noise filters and waveform-shaping circuits, reducing device complexity while maintaining reliable signal conversion.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the signal transmission approach by separating chip select and data signals not by pulse width but by their temporal pattern (successive vs. single pulses). This segmentation strategy allows both signal types to use the same pulse width, enabling a single noise filter design while maintaining clear signal differentiation and reducing transmission time.

Inventive Principle:
Principle #1Segmentation

2Reliability

If pulse width difference is made large to avoid signal degradation, then signal recognition accuracy improves, but transmission time per data item increases

Engineering Contradiction:
Improvesignal recognition accuracyVSAvoidtransmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces dynamic signal patterns where chip select signals are represented by successive pulses while data signals are represented by single pulses. This dynamic differentiation allows the system to maintain reliable signal recognition without requiring large pulse width differences, as the temporal pattern provides the discrimination capability. Consequently, transmission time is reduced compared to approaches that rely solely on large pulse width variations.

Inventive Principle:
Principle #15Dynamics

3Reliability

If two types of noise filters and waveform-shaping circuits are prepared for different pulse widths, then signal conversion reliability improves, but device complexity and cost increase

Engineering Contradiction:
Improvesignal conversion reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal pulse signal format where a single noise filter and waveform-shaping circuit can handle both chip select and data signals. By using successive pulses for chip select and single pulses for data, the system achieves multi-functionality with a single circuit design. This universal approach maintains signal conversion reliability while significantly reducing device complexity and cost compared to having separate circuits for different pulse widths.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10319407B2Signal conversion device, processing device, communication system, and signal conversion method
Publication Date: 2019.06.11 LAPIS SEMICON CO LTD
  • US10319407B2 patent drawing
  • US10319407B2 patent drawing
  • US10319407B2 patent drawing

AI summary

A signal conversion device includes a first converting section configured to convert a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line, into pulse signals including a first pulse train and a second pulse train; and a transmitting section configured to transmit the first pulse train through a fourth signal line and the second pulse train through a fifth signal line, wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and wherein the first converting section is configured to put successive pulses into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.