Gain-Peaking Receiver Circuit With Negative Capacitance

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Solution Overview

Problem

Conventional gain-peaking amplifiers for high-frequency applications face limitations in gain-bandwidth product, requiring significant increments in bias current and device size, and suffer from bandwidth reduction when cascaded stages are used, making them challenging for high-speed serial I/O designs due to severe transmission-line loss and signal reflections.

Innovation Solution

The implementation of a gain-peaking amplifier stage comprising a source-degenerative transconductance stage, a negative capacitance unit, and a trans-impedance stage with LC resonant circuits, which boosts gain by canceling parasitic capacitance and using a controlled current source with high output impedance, allowing for cascaded stages with improved gain-bandwidth response and reduced bandwidth reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional gain-peaking amplifiers are used for high-frequency applications, then gain-bandwidth product is limited, but increasing bias current and device size can improve gain

Engineering Contradiction:
Improvegain-bandwidth productVSAvoidbias current
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent changes the circuit topology from conventional Gm-RL to a new configuration using source-degenerative transconductance stage with negative capacitance unit and trans-impedance stage with LC resonant circuits. This parameter change in circuit architecture achieves higher gain-bandwidth product without proportionally increasing bias current, resolving the trade-off between gain and power consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a negative capacitance unit as an intermediary element between the transconductance stage and trans-impedance stage. This negative capacitance cancels parasitic capacitance effects, enabling the system to achieve extended bandwidth and improved gain-bandwidth product without requiring increased bias current or device size.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If cascaded stages are used to improve gain, then gain-bandwidth response improves, but bandwidth reduction occurs

Engineering Contradiction:
ImprovegainVSAvoidbandwidth
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The negative capacitance unit acts as an intermediary that compensates for the bandwidth-reducing effect of cascaded stages. By canceling parasitic capacitance at each stage, it allows multiple stages to be cascaded for higher gain while maintaining the bandwidth that would otherwise be reduced by the cascaded configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful effect of parasitic capacitance in cascaded stages into a benefit by using negative capacitance to cancel it. The parasitic capacitance that normally reduces bandwidth is compensated by the negative capacitance unit, allowing cascaded stages to achieve high gain without the expected bandwidth penalty.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the gain-peaking performance, supports high-speed data rates, reduces power consumption, and provides flexible gain adjustment, while minimizing parasitic capacitance and improving AC performance, effectively addressing the limitations of conventional designs.

Implementation Method 1

a negative capacitance unit, and a trans-impedance stage with LC resonant circuits, which boosts gain by canceling parasitic capacitance

Methodology Applied
Scientific EffectNegative capacitance: Capacitance

Implementation Method 2

a trans-impedance stage with LC resonant circuits

Methodology Applied
Scientific EffectLC resonance: Resonance

Data Source

PatentUS9184957B2High speed receivers circuits and methods
Publication Date: 2015.11.10 INTEL CORP
  • US9184957B2 patent drawing
  • US9184957B2 patent drawing
  • US9184957B2 patent drawing

AI summary

The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided.