Dual Damascene Filler Pattern Formation for Wiring Protection
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Solution Overview
Problem
In semiconductor manufacturing, the dual damascene process for forming copper interconnections can damage lower wiring due to insufficient filler thickness, which is challenging to achieve with existing semiconductor processing equipment constraints.
Innovation Solution
A method involving multiple etch-back processes to form filler patterns within vias and trenches, ensuring a thicker filler is achieved without damaging the lower wiring, by forming an etch stop layer, interlayer insulating film, and sequentially adding and etching back filler layers to create a residual filler pattern that protects the wiring during trench formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single filler formation process is used, then the manufacturing process is simple, but the filler thickness is insufficient to protect lower wiring
Solution Approach 1:
The filler formation process is divided into multiple sequential steps: forming a first filler material, etching it back to create a first filler pattern, then forming a second filler material on top, and etching it back to create a second filler pattern. This segmentation allows each layer to contribute to the overall protection, with the combined thickness of both filler patterns providing sufficient protection to the lower wiring during subsequent trench etching processes.
Solution Approach 2:
The first filler pattern is formed and established before the second filler pattern is added. This preliminary action ensures that the base layer of protection is in place before additional filler is deposited, allowing for controlled building of filler thickness while maintaining process control and preventing damage to lower wiring from the outset.
2Reliability
If the filler is made thicker to protect lower wiring, then wiring protection is improved, but the manufacturing process becomes more complex
Solution Approach 1:
Instead of attempting to deposit a single thick filler layer which would be difficult to control and form uniformly, the process segments the filler formation into multiple thinner layers. Each layer is formed and etched back in sequence, making each individual deposition step easier to control while the cumulative effect achieves the required total thickness for wiring protection.
Solution Approach 2:
The process forms filler material that extends beyond the final required thickness, then uses etch back to remove the excess. This approach ensures sufficient filler thickness is achieved (excessive action) while the etch back step trims it to the precise final dimension needed for protection without being overly thick or difficult to manufacture.
3Manufacturing precision
If multiple etch-back processes are used to form filler patterns, then filler thickness is sufficient, but the number of process steps increases
Solution Approach 1:
The manufacturing process is segmented into distinct formation and etch-back cycles for different filler materials. This segmentation allows precise control over the thickness of each filler pattern independently, ensuring manufacturing precision for the total filler thickness while organizing the process into manageable, repeatable units that can be optimized for productivity.
Solution Approach 2:
The process changes parameters between filler formation steps, using different filler materials (first filler material vs. second filler material) with potentially different properties. This allows optimization of each step for its specific purpose while achieving the overall goal of sufficient filler thickness with controlled precision, balancing manufacturing precision requirements with reasonable process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents damage to lower wiring during the formation of vias and trenches, enhancing the reliability and precision of semiconductor devices by ensuring a sufficient filler thickness, thereby maintaining the integrity of the wiring structure.
Implementation Method 1
The interlayer insulating film is etched to form a via. The via exposes an upper surface of the etch stop layer. A first filler is formed in the via. The first filler is etched to form a first filler pattern. A second filler is formed on the first filler pattern within the via. The second filler is etched to form a second filler pattern. The interlayer insulating film is etched to form a trench.
Data Source
AI summary
An etch stop layer is formed on a lower wiring. An interlayer insulating film covers the lower wiring and the etch stop layer. A via exposes an upper surface of the etch stop layer, in the interlayer insulating film. A first filler is formed in the via. The first filler is etched to a first filler pattern. A second filler is formed on the first filler pattern and is etched to a second filler pattern. A trench is formed by etching the interlayer insulating film. The first and second filler patterns are etched during the forming of the trench to form a residual filler pattern. The residual filler pattern and the etch stop layer are removed and a wiring structure is formed electrically connected to the lower wiring. The via includes lower and upper portions and the trench includes the upper portion of the via.