Dual Damascene Pattern Formation via Mandrel Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional dual damascene processes for semiconductor fabrication are inefficient and costly, particularly at sub-micron or nanometer levels, due to issues like dielectric constant k value degradation and critical dimension variations, leading to low yield and fragile dielectric layers.

Innovation Solution

A pattern forming method involving the formation of an etch stop layer, a material layer, and a passivation layer on top of the dielectric layer, using multiple patterned masks with apertures to protect the dielectric layer during etching, cleaning, and resist stripping, allowing for rework and improving the quality and yield of inter-metal dielectric and dual damascene patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple resist coatings, BARC coatings, exposures, developments, etchings, and inspections are employed in conventional dual damascene processes, then the precision of sub-micron or nanometer level patterning is achieved, but the cost and time required become excessively consuming

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent divides the patterning process into two separate stages: first forming a mandrel pattern, then forming the final dual damascene pattern. This segmentation allows each stage to be optimized independently, reducing the total number of processing steps required while maintaining sub-micron precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mandrel structure is formed in advance as a preliminary step, serving as a template for the subsequent dual damascene pattern formation. This preliminary action simplifies the final patterning step and reduces the complexity of the overall process

Inventive Principle:
Principle #10Preliminary action

2Reliability

If rework is performed for abnormalities found during ADI or AEI processes, then quality issues are addressed, but the quality of the inter-metal dielectric layer degrades due to k value degradation or critical dimension variations

Engineering Contradiction:
Improvequality controlVSAvoidcritical dimension accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The dielectric layer is protected in advance by forming the mandrel structure and subsequent layers that shield it during etching and cleaning processes. This preliminary protection prevents the need for rework that would otherwise degrade the dielectric layer quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediate protective layers and structures (such as the material layer and passivation layer) that act as mediators between the processing steps and the dielectric layer, preventing direct exposure to harmful etchants and cleaning agents

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional dual damascene processes are used for connecting metal wires and via plugs, then interconnect functionality is achieved, but the process becomes increasingly costly and time-consuming at sub-micron levels

Engineering Contradiction:
Improveinterconnect fabricationVSAvoidfabrication throughput
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The interconnect fabrication process is segmented into distinct stages: mandrel formation, material deposition, and final pattern transfer. This segmentation enables parallel processing and reduces the sequential dependency of steps, improving overall throughput

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mandrel structure serves multiple functions: it defines the pattern, protects the dielectric layer, and guides subsequent processing steps. This self-service capability reduces the need for additional protective measures and processing steps

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8791013B2Pattern forming method
Publication Date: 2014.07.29 UNITED MICROELECTRONICS CORP
  • US8791013B2 patent drawing
  • US8791013B2 patent drawing
  • US8791013B2 patent drawing

AI summary

A pattern forming method is disclosed. The method includes the steps of: forming a dielectric layer on a substrate; forming a first patterned mask on the dielectric layer, wherein the first patterned mask comprises an opening; forming a material layer on the dielectric layer and covering the first patterned mask; forming a second patterned mask on the material layer, wherein the second patterned mask comprises a first aperture; forming a second aperture in the second patterned mask after forming the first aperture, wherein the second aperture and the first aperture comprise a gap therebetween and overlap the opening; and utilizing the second patterned mask as an etching mask for partially removing the material layer and the dielectric layer through the first aperture and the second aperture.