Dual-DBC MOSFET Package Layout for Two-Sided Heat Dissipation

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Solution Overview

Problem

Existing packaged power electronic devices, particularly those with high voltage and high switching current MOSFET transistors, face challenges with thermal dissipation and size constraints when using upward cooling configurations, leading to insufficient heat removal and increased device size.

Innovation Solution

A packaged electronic device with a two-level arrangement of MOSFET transistors and a DBC multilayer support structure, where each MOSFET transistor is bonded to a separate support element with conductive and insulating layers, allowing for efficient thermal dissipation on both sides and a compact design by projecting leads beyond the housing for external connection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a single DBC substrate is used to support multiple MOSFET transistors with upward cooling configuration, then the device size is reduced, but the thermal dissipation capacity is insufficient

Engineering Contradiction:
Improvedevice sizeVSAvoidthermal dissipation capacity
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent divides the support structure into multiple separate DBC substrates (first DBC substrate and second DBC substrate) instead of using a single substrate. Each substrate independently supports specific MOSFET transistors and provides its own thermal dissipation path, thereby increasing overall thermal dissipation capacity while maintaining a compact device footprint.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If leads are arranged on the same side of the dissipation structure, then the package structure is simplified, but the cooling direction is limited to downward only

Engineering Contradiction:
Improvepackage structureVSAvoidcooling direction flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent utilizes the third dimension (vertical stacking) by arranging MOSFET transistors and DBC substrates in multiple levels. The first and second MOSFET transistors are positioned at different heights, with their drains connected to different sides of the housing, enabling heat dissipation in multiple directions (both upward and downward) while maintaining a compact overall structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Temperature

If multiple separate support elements are used for each MOSFET transistor, then the thermal dissipation efficiency is improved, but the device complexity increases

Engineering Contradiction:
Improvethermal dissipation efficiencyVSAvoidnumber of support elements
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent combines multiple DBC substrates with the housing structure through integrated connection mechanisms. The first and second DBC substrates are both connected to the housing, creating a unified thermal management system where the housing serves as a common heat sink, thereby reducing the number of separate external support elements needed.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides enhanced thermal dissipation capacity and a compact form factor by ensuring heat transfer from the MOSFET transistors to both sides of the device, addressing the limitations of prior art in terms of size and thermal efficiency.

Implementation Method 1

The solution provides enhanced thermal dissipation capacity and a compact form factor by ensuring heat transfer from the MOSFET transistors to both sides of the device

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP3780100B1Packaged power electronic device with plural DBC-like substrates and assembling process thereof
Publication Date: 2024.05.22 STMICROELECTRONICS SRL
  • EP3780100B1 patent drawingFigure 1~3I
  • EP3780100B1 patent drawingFigure 4~5
  • EP3780100B1 patent drawingFigure 6~12

AI summary

A packaged power electronic device (50, 150) comprises: a first support element (56) having a first and a second face (56', 56"), the first face (56') of the first support element forming a first thermal dissipation surface (50A, 150A) of the device (50, 150); a second support element (57) having a first and a second face (57', 57"), the first face (57') of the second support element (57) forming a second thermal dissipation surface (50B, 150B) of the device (50, 150), the first and the second support elements (56, 57) being superimposed to each other with the respective second faces (56", 57") facing each other; a first, a second, a third and a fourth power component (51-54) (e.g., power transistors), the first and third power components (51, 53) being attached to the second face (57") of the second support element (57), the second and the fourth power components (52, 54) being attached to the second face (56") of the first support element (56); a first contacting element (60) superimposed and in electric contact with the second and the fourth power components (51, 53); a second contacting element (80) superimposed and in electric contact with the first power component (51); a third contacting element (81) superimposed and in electric contact with the third power component (54); a plurality of leads (59A-59H, 77A-77F) electrically coupled with the power components (51-54) through the first and/or the second support elements (56, 57); a thermally conductive body (93, 94) (e.g., a block of conductive material (94), such as copper, or an adhesive mass (93), such as solder) arranged between the first, the second and the third contacting elements (60, 80, 81); the second and the third contacting elements (80, 81) being arranged side by side and electrically insulated from each other; wherein the first and the second support elements (56, 57) and the first, the second and third contacting elements (60, 80, 81) are formed by electrically insulating and thermally conductive multilayers, e.g. direct bonded copper (DBC). The first, second and third contacting elements (60, 80, 81) may have a first and a second dimension that are greater than a depth dimension, the second and third contacting elements (80, 81) being adjacent to each other on a side extending along the first dimension (X) and being offset with respect to the first contacting element (60) along the second direction (Y) and optionally also in the first direction (X). The first, second, third and fourth power components (51-54) may be electrically connected to form a full-bridge. First conductive layers (80A, 81A) of the second and the third contacting elements (80, 81) may be coupled to conductive regions (58H, 58G) of the first support element (56) through a first and, respectively, a second connection pillar element (67, 68) of conductive material. The device (50, 150) may further comprise a first and a second clip element (82, 83) of electrically conductive material, the first clip element (82) extending between the first conductive layer (80A) of the second contacting element (80) and the first power component (51) and the second clip element (83) extending between the first conductive layer (81A) of the third contacting element (81) and the third power component (53), the first and the second clip elements (82, 83) having a respective projecting portion extending beyond the first and, respectively, the third power component (51, 53) and being electrically coupled at the respective projecting portion to the first and respectively the second connection pillar element (67, 68). The second and the third contacting elements (80, 81) may be longer than the first and the third power components (51, 53) and coupled at one own projecting portion to the first and respectively the second connection pillar element (67, 68). A first and a second supporting pillar portions (85) may extend between a respective projecting portion and the second support element (57) aligned with the first and, respectively, the second connection pillar elements (67, 68), the first and the second supporting pillar portions (85) being formed each by an electrically insulating and thermally conductive multilayer, e.g. DBC, and forming, with the respective first and second connection pillar elements (67, 68), a first and a second alignment and spacing structure (89). The first and the second support elements (56, 57) may further have an elongated shape with a first and a second longitudinal end, wherein the first and second alignment and spacing structures (89) are arranged in proximity to the first longitudinal end of the first and the second support elements (56, 57), the device (50, 150) comprising a third and a fourth alignment and spacing structures (90) extending in proximity to the second longitudinal end of the first and the second support elements (56, 57), wherein the third alignment and spacing structure (90) comprises a third supporting pillar portion (92) and a first supporting pillar element (91) aligned with each other and the fourth alignment and spacing structure (90) comprises a fourth supporting pillar portion (92) and a second supporting pillar element (91) aligned with each other, the third and the fourth supporting pillar portions (92) being formed each by an electrically insulating multilayer, e.g., DBC, the first and the second supporting pillar elements (91) being of conductive material. The first, second and third contacting element (60, 80, 81) and the thermally conductive body (93, 94) may form a thermal distribution structure (95), assembled before bonding with the power components (51-54).