Dual-Delay Glitch Filter for Short Pulse Removal
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Solution Overview
Problem
Existing glitch filters in digital signal processing suffer from meta-stability issues and are not readily adjustable, often unintentionally altering the informational content of digital signals and requiring fixed maximum glitch durations, which limits their effectiveness in removing short pulses.
Innovation Solution
A circuit portion that includes first and second delay circuit portions to introduce time delays to rising and falling edges of digital signals, respectively, and a logic circuit portion to combine these delayed signals, effectively removing pulses of short duration while maintaining the informational content of longer pulses, with adjustable thresholds for pulse removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a string of digital delay cells is used to remove glitches, then short pulses are removed from the digital signal, but meta-stability issues occur and the informational content of the signal is unintentionally altered
Solution Approach 1:
The circuit segments the delay function into two independent parallel paths: one path delays the rising edge while the other path delays the falling edge. Each path has its own delay circuit portion with independently adjustable delay thresholds. This segmentation allows selective filtering of short pulses without uniformly altering all signal transitions, thereby preserving informational content while removing glitches.
2Reliability
If fixed delay thresholds are set on manufacture, then glitch filtering is effective for predetermined pulse durations, but the filter is not readily adjustable to different glitch durations
Solution Approach 1:
The circuit implements dynamic adjustability by providing control inputs that allow the delay thresholds of both delay circuit portions to be modified during operation. The first delay threshold and second delay threshold can be independently adjusted to match different glitch duration requirements, transforming a static filter into an adaptive system that responds to varying signal conditions.
3Reliability
If delay circuit portions introduce time delays to remove short pulses, then glitches are filtered, but the time periods between signal edges are altered
Solution Approach 1:
The circuit applies delay locally and selectively rather than globally. Each delay circuit portion introduces delay only to its specific edge type (rising or falling) and only when the pulse duration falls below the respective threshold. This localized application ensures that only problematic short pulses are affected, while legitimate signal transitions maintain their original timing relationships.
Data Source
AI summary
A circuit portion for filtering digital signals comprises a first delay circuit portion, a second delay circuit portion, and a logic circuit portion. The first delay circuit portion introduces a time delay to rising edges of an input signal and outputs a first delayed digital signal. The second delay circuit portion introduces a time delay to falling edges of the input signal and outputs a second delayed digital signal. The logic circuit portion outputs a signal which retains a current state when the first and second delayed signals have different states, and a state that is dependent on a state of the first and second delayed signals when the first and second delayed 10 signals have the same state. The circuit portion effectively removes glitches—i.e. pulses of short duration—from the input signal.