Dual-DFE Receiver Circuit for ISI Equalization With Lower Current
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Solution Overview
Problem
Existing memory devices face challenges in maintaining signal integrity due to inter-symbol interference (ISI) as data rates increase, leading to decreased signal quality, and current equalization methods consume excessive current without optimal performance.
Innovation Solution
A receiver circuit with dual decision feedback equalizers (DFEs) that perform a training operation to confirm ISI and adjust equalization functions based on the confirmation result, using a combination of Current-summer and Gm-control DFEs to minimize current consumption while enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Current-summer DFE is used to improve signal integrity, then SI characteristics are improved, but current consumption increases
Solution Approach 1:
The patent implements a dynamic equalization method where the receiver circuit performs a training operation to detect ISI characteristics, then dynamically selects between Current-summer DFE and Gm-control DFE based on the detected interference level. This dynamic adaptation allows the system to use the higher-performance Current-summer DFE only when ISI is severe, while using the lower-power Gm-control DFE when interference is mild, thus resolving the contradiction between signal integrity and current consumption.
Solution Approach 2:
The patent changes the operational parameters of the equalizer by switching between two different DFE configurations (Current-summer and Gm-control) based on ISI detection results. This parameter change allows the system to optimize the balance between signal integrity and power consumption according to actual channel conditions, rather than using a fixed high-power configuration.
2Reliability
If equalization function is always activated to remove ISI, then signal quality is improved, but current consumption increases
Solution Approach 1:
The patent implements periodic training operations at predetermined intervals to detect ISI characteristics. Based on these periodic detections, the equalization function is selectively activated or deactivated. This periodic monitoring approach ensures signal quality is maintained when needed while avoiding continuous activation of power-consuming equalization circuits when interference is absent or minimal.
Solution Approach 2:
The patent extracts and removes the equalization function from continuous operation, activating it only when ISI is detected through training operations. This selective extraction of the equalization function from always-on operation reduces current consumption while maintaining signal quality when interference is present.
3Reliability
If training operation is performed to detect ISI, then equalization can be optimized, but operation time increases
Solution Approach 1:
The patent performs training operations partially - only at predetermined intervals and only for the duration needed to detect ISI characteristics. This partial training approach provides sufficient information for equalization optimization without requiring continuous or excessively long training sequences, thus balancing equalization performance with operation time constraints.
Data Source
AI summary
A receiver circuit includes an input unit configured to receive a reception pattern signal in a training mode, and a reception normal signal in a normal mode, an enable control unit configured to determine whether to activate an enable signal according to the reception pattern signal in the training mode, a first decision feedback equalizer configured to operate in an activation period of the enable signal, and to remove a first post-cursor component for the reception normal signal by calibrating a currently received value based on a previously received value of the reception normal signal, and a second decision feedback equalizer configured to, when the enable signal is in an activated state, remove second to Nth post-cursor components for the reception normal signal by adjusting driving abilities of input transistors, to which the currently received value is applied, according to patterns of the reception normal signal.