Dual Drift Layer Extended Drain MOSFET Area Reduction
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Solution Overview
Problem
Integrated circuits with extended drain MOS transistors face challenges in reducing the area and series resistance while maintaining a desired operating drain voltage, which is not effectively addressed by existing technologies.
Innovation Solution
A dual drift layer extended drain MOS transistor is implemented, featuring a lower drift layer with a higher average doping density compared to the upper drift layer, formed through epitaxial growth or ion implantation, and segmented to reduce local doping density, allowing for efficient series resistance and punch-through voltage management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the area of the extended drain MOS transistor is reduced, then the integration density is improved, but the series resistance increases
Solution Approach 1:
The drift region is divided into two distinct layers: an upper drift layer with lower doping density and a lower drift layer with higher doping density. This segmentation allows each layer to contribute differently to the overall device performance, with the upper layer providing high breakdown voltage and the lower layer providing low series resistance, thereby reducing the required area while maintaining reliable electrical characteristics
Solution Approach 2:
Different regions of the drift structure are assigned different doping densities to optimize local functions. The upper drift layer has lower doping density (5×10^15 to 5×10^16 atoms/cm³) for high voltage support, while the lower drift layer has higher doping density (1×10^16 to 5×10^17 atoms/cm³) for low resistance. This local quality differentiation enables the device to achieve both high breakdown voltage and low series resistance in a compact area
2Reliability
If the doping density in the drift region is increased, then the series resistance is reduced, but the breakdown voltage decreases
Solution Approach 1:
The drift region is segmented into two layers with different doping densities. The upper drift layer maintains low doping density (5×10^15 to 5×10^16 atoms/cm³) to ensure high breakdown voltage, while the lower drift layer uses higher doping density (1×10^16 to 5×10^17 atoms/cm³) to reduce series resistance. This segmentation resolves the contradiction by assigning different doping levels to different spatial regions, allowing both high breakdown voltage and low series resistance to coexist
Solution Approach 2:
The patent applies local quality by creating a vertical gradient in doping density within the drift region. The upper portion has lower doping density for voltage support, while the lower portion has higher doping density for resistance reduction. This localized optimization of doping density at different depths of the drift region enables simultaneous achievement of high breakdown voltage and low series resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the area required for the MOS transistor while maintaining desired series resistance and operating voltage, enhancing the performance of the integrated circuit.
Implementation Method 1
the lower drift layer and the upper drift layer may be formed by ion implanting dopants into a monolithic substrate at sufficient energies to attain desired depths for the lower drift layer and the upper drift layer
Implementation Method 2
the lower drift layer may be formed by introducing dopants into a lower drift area in a substrate, followed by epitaxial growth of a semiconductor layer on the substrate and formation of the upper drift layer in the epitaxial layer
Data Source
AI summary
An integrated circuit containing a dual drift layer extended drain MOS transistor with an upper drift layer contacting a lower drift layer along at least 75 percent of a common length of the two drift layers. An average doping density in the lower drift layer is between 2 and 10 times an average doping density in the upper drift layer. A process of forming an integrated circuit containing a dual drift layer extended drain MOS transistor with a lower drift extension under the body region and an isolation link which electrically isolates the body region, using an epitaxial process. A process of forming an integrated circuit containing a dual drift layer extended drain MOS transistor with a lower drift extension under the body region and an isolation link which electrically isolates the body region, on a monolithic substrate.