Dual-Epi FinFET Flow for Independent N-P Control
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Solution Overview
Problem
The challenge in the microelectronics industry is to achieve independent epitaxial control for N-type and P-type field effect transistors (FETs) while preventing epi-shorting between devices, which is complex in conventional finFET processing, especially in SRAM structures.
Innovation Solution
A cut-very-last processing flow is implemented, where a first epitaxial material is added to an array of fins, followed by masking and directional etching, allowing for dual-epi FinFETs with a single-mask solution that resolves epi-shorting issues by performing these steps after source/drain formation, enabling uniform gate profiles and reduced parasitic resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional finFET processing is used, then device fabrication can proceed through standard steps, but independent epitaxial control for N-type and P-type FETs becomes complex and epi-shorting between devices occurs
Solution Approach 1:
The patent segments the fin array into distinct regions using masking materials, allowing separate epitaxial growth for NFET and PFET devices. Dummy fins are used as sacrificial structures to define device boundaries, enabling independent epi control without complex processing by dividing the structure into controllable segments
Solution Approach 2:
The patent performs preliminary actions by forming dummy fins and applying masking materials before the actual epitaxial growth. These preparatory structures and masks are in place to guide the subsequent epi deposition, preventing epi-shorting before it can occur and establishing the framework for independent device fabrication
2Reliability
If epi-shorting prevention is implemented through conventional methods, then device isolation is attempted, but the complexity increases especially in SRAM structures
Solution Approach 1:
The patent uses dummy fins as intermediary sacrificial structures that mediate between the epitaxial growth process and device isolation requirements. These dummy fins act as placeholders that prevent epi-shorting by defining clear boundaries, and are removed later without affecting the final device structure, thus preventing epi-shorting without increasing permanent structural complexity
Solution Approach 2:
The patent employs dummy fins that are discarded after serving their protective function during epitaxial growth. These sacrificial structures are removed in a final cleaning step, having fulfilled their purpose of preventing epi-shorting during manufacturing, thus achieving reliable device isolation without permanent structural complexity
3Manufacturing precision
If source/drain formation is performed before epitaxial steps, then standard processing sequence is maintained, but control over threshold voltage and parasitic resistance is reduced
Solution Approach 1:
The patent inverts the conventional processing sequence by performing epitaxial growth and device isolation steps before source/drain formation. This reversal allows the epitaxial structures to define the device geometry and electrical characteristics first, enabling precise threshold voltage control and reduced parasitic resistance, with source/drain formed subsequently to complete the device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the control over threshold voltage and reduces unwanted epi-shorting, improving the performance and scalability of FinFETs by allowing independent epi control for N-type and P-type FETs, thereby addressing the limitations of conventional finFET processes.
Implementation Method 1
adding a first epitaxial material to an array of fins
Implementation Method 2
performing a directional etch using the first masking material and the second masking material
Data Source
AI summary
A method for making dual-epi FinFETs is described. The method includes adding a first epitaxial material to an array of fins. The method also includes covering at least a first portion of the array of fins using a first masking material and removing the first epitaxial material from an uncovered portion of the array of fins. Adding a second epitaxial material to the fins in the uncovered portion of the array of fins is included in the method. The method also includes covering a second portion of the array of fins using a second masking material and performing a directional etch using the first masking material and the second masking material. Apparatus and computer program products are also described.