Dual Flip-Flop Sampling for Fault Injection Timing Checks
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Solution Overview
Problem
Existing electronic devices are vulnerable to fault injection attacks, which can cause timing violations and unauthorized information leakage due to glitches or external interference, as current detection methods are inadequate in preventing such attacks.
Innovation Solution
The implementation of a dual-sampling scheme using functional and protection state-sampling components with a predefined time offset, along with protection logic to detect discrepancies and initiate responsive actions, such as alert signals or modified clock signals, to protect combinational logic circuits from signal instability and glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional single-sampling flip-flops are used, then device complexity is low, but reliability is poor due to vulnerability to fault injection attacks
Solution Approach 1:
The sampling process is segmented into multiple independent sampling operations with different timing. Each sampling flip-flop captures the signal at a distinct time point, creating divided sampling instances that can be independently verified for integrity
Solution Approach 2:
Protective sampling actions are performed in advance of the main functional sampling. The protection flip-flops sample the signal earlier with different timing characteristics, creating preliminary data that can detect faults before they affect the primary operational sampling
2Reliability
If multiple sampling flip-flops with different timing are used, then reliability improves through fault detection, but device complexity increases due to additional components
Solution Approach 1:
The timing parameters of the sampling operations are changed to create diversity. By adjusting the sampling clock phases and timing offsets, the system achieves multiple sampling perspectives using flip-flops with modified temporal characteristics rather than adding fundamentally different components
3Productivity
If sampling occurs during unstable signal portions, then productivity is high due to continuous operation, but reliability deteriorates due to timing violations and glitches
Solution Approach 1:
The sampling operation is structured as periodic action with distinct phases. During stable portions of the signal cycle, sampling flip-flops capture data; during unstable portions, protective sampling continues at different timing to detect faults. This periodic alternation maintains continuous operation while ensuring reliability
Data Source
AI summary
An electronic device includes a combinational logic circuit, one or more functional state-sampling components, one or more protection state-sampling components, and protection logic. The combinational logic circuit has one or more outputs. The functional state-sampling components are configured to sample the respective outputs of the combinational logic circuit. The protection state-sampling components are associated respectively with the functional state-sampling components, each protection state-sampling component configured to sample a same output of the combinational logic circuit as the corresponding functional state-sampling component, but with a predefined time offset relative to the functional state-sampling component. The protection logic is configured to detect a discrepancy between the outputs sampled by the functional state-sampling components and the respective outputs sampled by the protection state-sampling components, and to initiate a responsive action in response to the discrepancy.