Dual-Gate Thin-Film Transistor Layout for Low Leakage
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Solution Overview
Problem
Thin film transistors face issues such as increased leakage current and size increase as operating voltage increases, particularly in high-voltage applications like electrophoretic displays and antenna devices.
Innovation Solution
The electronic device incorporates a semiconductor pattern with overlapping and side regions, where a second gate electrode is strategically positioned to overlap with the second side region, reducing leakage current without significantly affecting conduction current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the operating voltage of thin film transistors is increased for high-voltage operations, then the transistor can drive high-voltage devices, but the leakage current increases and the device size increases
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) positioned at opposite sides of the semiconductor pattern. This segmentation allows independent control of voltage application, enabling high-voltage operation while maintaining low leakage current by applying voltage only during active periods.
Solution Approach 2:
The patent implements dynamic voltage control where the first and second gate electrodes are selectively activated based on operational requirements. During high-voltage operation, both gates are used; during standby periods, voltages are reduced or reversed to minimize leakage, creating a dynamic adaptation to operational states.
2Power
If the operating voltage of thin film transistors is increased for high-voltage operations, then the transistor can drive high-voltage devices, but the device size increases
Solution Approach 1:
Instead of increasing the area of a single gate electrode to handle high voltage, the patent transitions to a three-dimensional configuration with gate electrodes positioned at opposite vertical sides of the semiconductor pattern. This dimensional change allows high-voltage capability without proportional increases in planar device footprint.
Solution Approach 2:
The gate function is segmented into two spatially separated electrodes that can be independently controlled. This segmentation enables the device to achieve high-voltage operation through distributed electric field control rather than requiring a single large gate structure, thereby maintaining compact device dimensions.
3Power
If a single large gate electrode is used for high-voltage operation, then high voltage can be achieved, but the leakage current increases
Solution Approach 1:
The gate is segmented into two oppositely positioned electrodes that can be independently biased. This allows the semiconductor channel to be fully depleted of carriers during standby by applying appropriate voltages to both gates, effectively eliminating leakage paths that would exist with a single gate configuration.
Solution Approach 2:
Different regions of the semiconductor pattern are controlled by different gate electrodes. The first gate electrode controls one interface while the second gate electrode controls the opposite interface, allowing localized electric field management that optimizes both high-voltage capability and leakage suppression in different spatial regions.
Data Source
AI summary
An electronic device including a substrate and an electronic element is provided. The electronic element is disposed on the substrate and includes a first gate electrode, a semiconductor pattern, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern includes an overlapping region, a first side region and a second side region. A portion of the semiconductor pattern overlapped with the first gate electrode is defined as the overlapping region. The first side region and the second side region are respectively connected to two opposite sides of the overlapping region in a first direction and respectively include two opposite first edges of the semiconductor pattern. The source electrode and the drain electrode are respectively electrically connected to the first side region and the second side region. At least a portion of the second gate electrode is overlapped with the second side region of the semiconductor pattern.


