Dual-Active-Layer Array Substrate for Higher TFT On-State Current
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Solution Overview
Problem
In display panels, the on-state current and mobility of equivalent carriers in thin film transistors are low, limiting the comprehensive performance of display devices.
Innovation Solution
An array substrate with a dual-layer active structure, where the first active layer and second active layer are connected in parallel through a conductor layer, with doped areas and a source/drain metal layer configuration that enhances carrier mobility and current, reducing series resistance and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lightly doped drains and raised source-drain structures are formed in thin film transistors, then stability and reliability are improved, but on-state current and mobility of equivalent carriers are reduced
Solution Approach 1:
The active layer is divided into two separate active layers (first active layer and second active layer) with each having its own channel region and doped regions. This segmentation allows independent optimization of each layer's function, enabling one layer to provide stability through lightly doped drains while the other layer maintains high on-state current through different doping configurations.
Solution Approach 2:
The invention transitions from a single-plane transistor structure to a stacked three-dimensional structure with active layers arranged in different vertical levels. The first active layer is disposed on the substrate while the second active layer is disposed on the gate insulating layer, creating vertical stacking that increases functional density without expanding lateral area, thereby resolving the contradiction between reliability enhancement and current maintenance.
2Power
If traditional single-layer active structure is used, then device complexity is low, but on-state current and mobility are insufficient
Solution Approach 1:
The active layer is divided into two separate active layers (first active layer and second active layer) with each having its own channel region and doped regions. This segmentation allows independent optimization of each layer's function, enabling one layer to provide stability through lightly doped drains while the other layer maintains high on-state current through different doping configurations.
Solution Approach 2:
Two active layers are merged into a single integrated transistor structure where the first active layer and second active layer work together with a shared gate electrode. The merging of these layers creates a composite structure that achieves high on-state current and mobility while maintaining manageable device complexity through unified gate control and integrated architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-layer active structure effectively increases the on-state current and mobility of carriers, enhancing the comprehensive performance of display panels by reducing layout area and improving transistor performance.
Implementation Method 1
the first active layer comprising a first channel area and first doped areas located at two sides of the first channel; a second active layer comprising a second channel area and second doped areas located at two sides of the second channel area
Data Source
AI summary
Embodiments of the present disclosure provide an array substrate and a display panel. The array substrate includes a first active layer, a gate electrode, a gate insulating layer, a second active layer, and a source/drain metal layer. The first active layer is connected in parallel with the second active layer through a conductor layer. Through an active layer structure with two layers in parallel, an on-state current and mobility of equivalent carriers of a device are effectively improved, and a comprehensive performance of the device is improved.