Dual-Layer Leadframe Routing for Low-Impedance Die-to-Die Signals
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Solution Overview
Problem
Existing integrated circuit (IC) packages face high impedance in the signal loop due to reliance on external ground planes, leading to voltage overshoot that interferes with high-frequency communications between semiconductor dies.
Innovation Solution
Incorporating a ground return path within the IC package by using a stacked arrangement of leadframes, where one leadframe provides a direct electrical connection and another leadframe offers a ground return path, containing the signal loop entirely within the package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the package relies on external ground planes for return current paths, then the package structure is simpler, but the signal loop impedance increases causing voltage overshoot
Solution Approach 1:
The patent introduces a dual-layer leadframe structure where the first leadframe carries the signal and the second leadframe provides the ground return path. This layered arrangement creates a three-dimensional signal loop contained within the package, transforming the traditional two-dimensional planar layout into a vertical stack configuration that reduces loop area and impedance.
Solution Approach 2:
The patent embeds the first leadframe (signal path) within the structure of the second leadframe (ground path), creating a nested configuration where the signal-carrying leadframe is positioned between the ground leadframe layers. This nesting approach minimizes the distance between signal and ground paths, reducing the signal loop area and associated impedance.
2Ease of manufacture
If the signal loop path is extended to external ground planes, then the package design is simpler, but voltage overshoot increases interfering with high-frequency communications
Solution Approach 1:
The patent extracts the ground return path function from the external PCB ground plane and relocates it to an integrated second leadframe within the package. This extraction creates a self-contained signal loop that does not depend on external references, eliminating the harmful voltage overshoot caused by extended current paths while maintaining manufacturing simplicity.
Solution Approach 2:
The second leadframe acts as an intermediary structure that provides the ground return path function previously fulfilled by external ground planes. This intermediate layer mediates between the signal-carrying first leadframe and the package housing, creating a controlled impedance environment that suppresses voltage overshoot while simplifying the overall design.
3Reliability
If a dual layer leadframe structure is implemented, then the signal loop impedance is reduced, but the device complexity increases
Solution Approach 1:
The patent designs the dual-layer leadframe structure where each leadframe layer serves multiple functions: the first leadframe provides both mechanical support and signal transmission, while the second leadframe provides both structural framework and ground return path. This multi-functionality reduces the need for additional separate components, offsetting the apparent complexity increase with functional consolidation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces signal loop impedance, mitigating voltage overshoot and enabling higher frequency communications between semiconductor dies, particularly beneficial for gallium nitride (GaN) dies.
Implementation Method 1
The conductor provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die
Implementation Method 2
The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal
Data Source
AI summary
A package includes a first leadframe including a plurality of leads and a conductor, a first semiconductor die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and the conductor, and a second semiconductor die mounted on the first surface of the first leadframe and attached a second subset of the plurality of leads and the conductor. The conductor provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die. The package further includes a second leadframe. The first leadframe is mounted on the second leadframe via a second surface of the first leadframe, the second surface opposite the first surface. The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal.