Dual-Layer Light Shielding Structure for Optoelectronic Chip Packages
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Solution Overview
Problem
Existing chip packages with light shielding layers suffer from cracks and voids due to high stress in protection layers, leading to light leakage and ineffective light blocking for optoelectronic devices.
Innovation Solution
A novel chip package design featuring a dual-layer light shielding structure where a second light shielding layer directly contacts the first, with a hardened interface to prevent defects and enhance light blocking, and a wafer-scale packaging process to reduce fabrication costs and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single light shielding layer is used, then the device complexity is reduced, but light blocking effectiveness deteriorates due to cracks and voids
Solution Approach 1:
The light shielding layer is divided into multiple segments (first light shielding layer and second light shielding layer) stacked on top of each other. Each layer can be formed and cured independently, allowing defects in one layer to be compensated by the other, thereby improving overall light blocking effectiveness while maintaining manageable complexity through modular construction
Solution Approach 2:
The patent uses multiple layers of light shielding material with potentially different compositions or properties. The composite structure of stacked light shielding layers provides enhanced light blocking capability compared to a single layer, as cracks and voids in one layer do not necessarily align with those in other layers, creating a more effective barrier
2Strength
If protection layer stress is increased to improve adhesion, then bonding strength is improved, but crack formation increases leading to light leakage
Solution Approach 1:
By segmenting the light shielding function into multiple layers, the stress distribution is also segmented. Each layer bears a portion of the stress, preventing the concentration of stress that would lead to crack formation in a single thick layer, thus maintaining bonding strength while preserving light shielding integrity
Solution Approach 2:
The multi-layer structure acts as a cushioning mechanism against stress-induced cracks. The additional layers provide redundant pathways for stress distribution, cushioning against the formation of continuous crack networks that would compromise light blocking effectiveness
3Reliability
If light shielding layer thickness is increased to improve light blocking, then light blocking effectiveness is improved, but defect formation (voids and cracks) increases
Solution Approach 1:
The total light shielding thickness is segmented into multiple thinner layers rather than one thick layer. This segmentation reduces the probability of defect formation in each individual layer, as thinner layers are easier to form uniformly without voids or cracks, while the cumulative thickness of multiple layers achieves the required light blocking effectiveness
Solution Approach 2:
Instead of increasing thickness in a single dimension (one thick layer), the solution distributes thickness across multiple dimensions (multiple stacked layers). This dimensional approach allows the same total light blocking path length to be achieved with fewer defects per layer, improving manufacturing precision while maintaining reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-layer light shielding structure effectively blocks external light, improving the reliability and operation of optoelectronic devices by increasing the overall thickness of the light shielding layers and reducing defects, thus enhancing the chip package's performance and reliability.
Implementation Method 1
a first light shielding layer disposed on the second surface of the substrate; and a second light shielding layer disposed on the first light shielding layer
Data Source
AI summary
An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a first light shielding layer disposed on the second surface of the substrate; and a second light shielding layer disposed on the first light shielding layer and directly contacting with the first light shielding layer, wherein a contact interface is between the first light shielding layer and the second light shielding layer.