Dual-Path Current Supply for Integrated Circuit Power Noise Mitigation
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Solution Overview
Problem
High-speed integrated circuits face performance issues due to power supply noise, which is exacerbated by variations in manufacturing and difficult to distinguish from workload variations, causing voltage dips in critical paths and impacting processor speed.
Innovation Solution
A system and method that includes a current supply circuit to supplement the power supplied by a voltage supply circuit, using a controller to determine current level variations and provide additional power through a second path, reducing parasitic effects and maintaining a stable power supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single power supply path is used to provide power to the integrated circuit, then the device complexity is low, but power supply noise and voltage dips occur in critical paths
Solution Approach 1:
The power supply system is divided into two separate paths: a first power supply path for providing baseline power and a second power supply path for providing additional power during high-demand periods. This segmentation allows each path to be optimized independently and prevents noise from a single path from affecting the entire system.
Solution Approach 2:
A current mode logic (CML) buffer circuit acts as an intermediary between the two power supply paths and the integrated circuit. The CML buffer receives power from both paths and distributes it to the IC, mediating the power delivery to ensure stability while isolating noise from the critical paths.
2Productivity
If power is increased to meet dynamic power demands, then the processor speed is maintained, but power supply noise is generated
Solution Approach 1:
The second power supply path is activated periodically or on-demand based on the current level variations detected in the integrated circuit. Instead of continuously providing maximum power, the system dynamically switches the second path on when additional current is needed and turns it off when normal operation suffices, reducing noise generation while maintaining processor speed.
Solution Approach 2:
The power supply system changes parameters by varying the current level provided by the second power supply path based on detected variations in the integrated circuit's current consumption. This dynamic parameter adjustment allows the system to match power delivery to actual demand, avoiding excessive power delivery that would generate noise.
3Reliability
If additional power paths are added to reduce parasitic effects, then power supply stability is improved, but the device complexity increases
Solution Approach 1:
The CML buffer circuit serves multiple functions: it receives power from both power supply paths, buffers the combined power signal, and distributes it to the integrated circuit. This multi-functionality reduces the need for separate dedicated components for each function, thereby limiting the increase in device complexity despite adding a second power path.
4Ease of manufacture
If manufacturing variations are present in power generating and delivering components, then production cost is reduced, but power supply noise effects are exacerbated
Solution Approach 1:
The system incorporates feedback by detecting current level variations in the integrated circuit and using this information to control the activation and power level of the second power supply path. This feedback mechanism compensates for manufacturing variations in the power components, ensuring stable power delivery and reducing noise effects despite component tolerances.
Data Source
AI summary
Provided are embodiments including methods, systems, and computer-program products for mitigating power supply noise using one or more current supplies. In some embodiments, power is provided to an integrated circuit, wherein a first circuit is coupled to the integrated circuit over a first path. A variation of the current level of the integrated circuit may be determined. Additional power from a second circuit is provided to the integrated circuit may be provided based at least in part on the determined variation, wherein the second circuit is coupled to the integrated circuit over a second path.