Dual-Power Register with Balloon Latch Data Retention
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Solution Overview
Problem
Conventional registers lose data when the power source is turned off due to high power consumption and lack of independent data retention mechanisms.
Innovation Solution
A register design incorporating a master-slave flip-flop supplied by a first power voltage and a balloon latch supplied by a second independent power voltage, with a level shifter for voltage conversion, allowing data retention even when the first power voltage is disabled.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all latches in a register are supplied by the same power source, then the register can operate normally, but the register cannot retain data when the power source is turned off and power consumption is too high
Solution Approach 1:
The register is divided into two independent latch groups: first latches supplied by a first power source and second latches supplied by a second power source. This segmentation allows independent power management where the second power source can be disabled to reduce power consumption while the first power source maintains data retention, resolving the contradiction between reliability and energy usage.
Solution Approach 2:
The patent changes the power supply parameter by introducing two independent power sources with different power consumption levels. The first power source is optimized for data retention with higher stability, while the second power source is optimized for low power consumption. By dynamically switching between or combining these power sources, the system achieves both data retention capability and reduced power consumption.
2Reliability
If a conventional register design is used, then the structure is simple, but data is lost when power is turned off
Solution Approach 1:
The register structure is segmented into first latches and second latches with independent power sources. This segmentation adds complexity to achieve data retention functionality that conventional single-power registers lack. The multiple latch groups can operate independently, allowing data to be retained in first latches even when second latches are powered down, thus improving reliability without requiring a complete redesign of the register architecture.
Solution Approach 2:
The register is designed with multi-functionality to operate in different modes: normal operation mode where both latch groups are active, and data retention mode where only the first latch group remains powered. This universal design allows the same register structure to serve both high-performance and low-power requirements, achieving data retention without requiring separate dedicated retention circuits.
Data Source
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AI summary
A register (200) with data retention includes a master-slave flip-flop (210), a balloon latch (220), and a level shifter (230). The master-slave flip-flop is supplied by a first power voltage (VDD1). The balloon latch is supplied by a second power voltage (VDD2). The second power voltage is independent of the first power voltage. The level shifter provides a voltage conversion between the master-slave flip-flop and the balloon latch. A data is stored in the master-slave flip-flop. When the first power voltage is disabled, the balloon latch is configured to temporarily retain the data.