Non-Volatile Memory Cell With Dual Selector Elements

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Solution Overview

Problem

Current non-volatile memory devices face challenges in reducing leakage currents and managing snapback currents, which affect the efficiency and reliability of memory operations, particularly in ultralow leakage and sub-threshold leakage requirements.

Innovation Solution

Incorporating a series connection of two selector elements with different leakage characteristics and threshold voltages within each non-volatile memory cell, along with a capacitor to absorb snapback currents, to optimize the current-voltage characteristics and reduce leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a single selector element is used in the memory cell, then the device complexity is low, but the leakage current is high and snapback effects are severe

Engineering Contradiction:
Improveleakage currentVSAvoidselector element configuration
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The single selector element is segmented into two series-connected selector elements with different threshold voltages. The first selector element has a first threshold voltage and the second selector element has a second threshold voltage higher than the first. This segmentation reduces leakage current by ensuring that at any given voltage, at least one selector element remains in a high-resistance state, while the series connection manages snapback effects through the combined voltage distribution.

Inventive Principle:
Principle #1Segmentation

2Loss of energy

If process geometries are shrunk to reduce cost per bit, then the manufacturing cost decreases, but design and process challenges increase

Engineering Contradiction:
Improvecost per bitVSAvoiddesign and process challenges
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The invention changes the electrical parameters of the selector elements, specifically using different threshold voltages for the two series-connected elements. This parameter differentiation allows the memory cell to maintain low leakage current and controlled snapback behavior even as the overall device dimensions are reduced for higher density, thereby addressing manufacturing challenges associated with scaled geometries.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If the threshold voltage of the second selector element is made higher than the first, then the leakage current is reduced, but the voltage requirements for write operations increase

Engineering Contradiction:
Improveleakage currentVSAvoidwrite operation voltage
Core Design Contradiction:
Loss of energyVSPower

Solution Approach 1:

The system dynamically manages voltage distribution across the two selector elements during different operations. During read operations, the lower threshold voltage element conducts while the higher threshold voltage element blocks leakage. During write operations, the applied voltage dynamically exceeds the higher threshold voltage to activate both elements, enabling state changes. This dynamic behavior allows the system to achieve low leakage during standby while maintaining write capability through sufficient voltage excursions.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves low leakage currents and high read margins, while minimizing snapback effects, thereby enhancing the performance and efficiency of memory operations.

Implementation Method 1

each non-volatile memory cell includes a first selector element, a second selector element, and a capacitor. The first selector element includes a first snapback current, and the second selector element includes a second snapback current lower than the first snapback current

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10553647B2Methods and apparatus for three-dimensional non-volatile memory
Publication Date: 2020.02.04 SANDISK TECHNOLOGIES LLC
  • US10553647B2 patent drawing
  • US10553647B2 patent drawing
  • US10553647B2 patent drawing

AI summary

An apparatus is provided that includes a bit line above a substrate, a word line above the substrate, and a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a reversible resistance-switching memory element coupled in series with an isolation element. The isolation element includes a first selector element coupled in series with a second selector element. The first selector element includes a first snapback current, and the second selector element includes a second snapback current lower than the first snapback current.