Dual Semiconductor Layer Thin Film Transistor for Stability
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Solution Overview
Problem
Thin film field effect transistors (FETs) with disordered semiconductor materials, such as amorphous silicon, exhibit instability over time due to carrier trapping, leading to shifting threshold voltages and reduced carrier mobility, which complicates circuit performance and accuracy.
Innovation Solution
A thin film FET design with dual semiconductor layers, where a first disordered semiconductor layer acts as a shielding layer to stabilize the electric field and reduce carrier trapping, while a second semiconductor layer maintains stable channel conductivity, without increasing device complexity or requiring unconventional materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single disordered semiconductor layer is used in a thin film FET, then the device can be manufactured with standard techniques, but the device exhibits time-dependent instability due to carrier trapping
Solution Approach 1:
The semiconductor layer is divided into two distinct layers: a first disordered semiconductor layer that serves as a carrier reservoir and shielding layer, and a second semiconductor layer that forms the active channel. This segmentation allows the first layer to absorb trapped carriers and prevent them from affecting the electrical characteristics of the second layer, thereby stabilizing the device while maintaining manufacturability with standard thin film deposition techniques
Solution Approach 2:
The first disordered semiconductor layer acts as an intermediary between the gate electrode and the second semiconductor layer. It shields the second layer from direct exposure to electric field fluctuations and carrier trapping effects, mediating the interaction between the gate and the channel to maintain stable device operation over time
2Reliability
If additional FETs are used to cancel instability, then device performance can be stabilized, but the circuit size and power consumption increase
Solution Approach 1:
The instability problem is extracted and isolated to the first semiconductor layer, which is designed to intentionally trap carriers. By removing the harmful instability from the active channel region (second layer) and confining it to the shielding layer, the device achieves stability without requiring additional compensating FETs or circuit elements
3Reliability
If the gate voltage is increased to maintain current, then the channel conductivity can be preserved, but the threshold voltage drifts over time due to carrier trapping
Solution Approach 1:
The device structure is segmented into two semiconductor layers with distinct functions. The first layer handles carrier trapping and threshold voltage stabilization, while the second layer maintains channel conductivity. This segmentation resolves the contradiction by distributing the functional requirements across two layers rather than requiring a single complex layer structure
Solution Approach 2:
The device uses a composite semiconductor structure combining two different semiconductor layers. The first layer (disordered semiconductor) and second layer (semiconductor material) work together to provide both threshold voltage stability and channel conductivity, achieving the desired performance through material composition rather than increased device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual semiconductor layer design enhances the stability and performance of thin film FETs by minimizing threshold voltage shifts and maintaining consistent channel current over time, suitable for applications like transition detection circuits without increasing circuit size or power consumption.
Implementation Method 1
the first semiconductor layer shields the gate terminal from the carrier trapping that occurs at the interface between the second semiconductor layer and the insulating layer
Implementation Method 2
maintaining stable channel conductivity
Data Source
AI summary
A thin film field effect transistor is disclosed which provides improved time-based channel stability. The field effect transistor includes first and second disordered semiconductor layers separated by an insulator. In an embodiment a carrier injection terminal is provided in a thin semiconductor layer closest to the gate terminal. An electric field is established in the thin semiconductor layer. At sufficient field strength, the electric field extends into the second semiconductor layer, which is in contact with the source and drain terminals. At sufficient field strength a channel is established in the second semiconductor layer, permitting current to flow between source and drain terminals. Above a certain gate voltage, there is sufficient free charge is induced in the first semiconductor layer so that the field does not extend into the second semiconductor, effectively shutting off current between source and drain. Single-device transition detection (as well as other applications) may be obtained.