Dual-Side Cooling Power Module Structure for Low Inductance

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Solution Overview

Problem

Dual side cooling power modules for eco-friendly vehicles face issues with parasitic inductance due to varying wire lengths of SiC elements, premature deterioration at high temperatures, and warpage caused by thermal expansion differences, leading to high failure rates and increased thermal resistance.

Innovation Solution

A dual side cooling power module design featuring a recessed lower substrate, stepped lead frames, and a conductive adhesive bond between substrates, eliminating the need for a spacer and enabling efficient dual-side cooling with a simplified internal structure, using sintering or ultrasonic welding for bonding and a molding portion for external insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SiC elements are mounted using wire bonding method, then electrical connections are established, but parasitic inductance increases due to varying wire lengths

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidparasitic inductance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the wire bonding process entirely by directly mounting SiC elements onto the substrate using conductive adhesive. This extraction of the harmful wire bonding step eliminates the source of parasitic inductance while maintaining electrical connectivity through the adhesive layer and direct contact method.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical wire bonding system with a chemical bonding system using conductive adhesive. This substitution eliminates the need for physical wires and their associated inductance, using instead a direct adhesive bond that provides both mechanical support and electrical conduction.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If soldering method is used to bond SiC elements, then electrical connections are established, but premature deterioration occurs at high temperatures above 200°C

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidservice life at high temperature
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent changes the material parameter of the bonding agent from solder (melting point 180-220°C) to conductive adhesive with high-temperature stability. This parameter change in the bonding material's thermal properties enables operation at temperatures above 200°C without premature deterioration, extending the service life of the module.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If dual side cooling power module is manufactured by soldering, then assembly is completed, but warpage occurs due to difference in coefficient of thermal expansion

Engineering Contradiction:
Improveassembly processVSAvoidmodule flatness
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent changes the bonding method parameter from soldering to conductive adhesive bonding. This parameter change eliminates the high-temperature soldering process that causes thermal expansion mismatches, allowing for more stable assembly that prevents warpage while maintaining manufacturing ease.

Inventive Principle:
Principle #35Parameter changes

4Power

If SiC elements with small chip sizes are used, then power density is increased, but thermal resistance increases due to reduced heat transmission area

Engineering Contradiction:
Improvepower densityVSAvoidheat dissipation efficiency
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent introduces dual-side cooling to add a dimensional aspect to heat dissipation. Instead of relying solely on the limited area of small chip faces, heat can now be extracted from both the top and bottom surfaces of the SiC elements, effectively doubling the heat transmission pathways and reducing thermal resistance despite the small chip size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces parasitic inductance, maintains chip performance above 200°C, minimizes thermal deformation, and lowers thermal resistance, enhancing heat dissipation efficiency and reducing the load on the cooling system.

Implementation Method 1

the semiconductor chip may be bonded to the upper surface of the lower substrate and a lower surface of the upper substrate by using a conductive adhesive

Methodology Applied
Scientific EffectConduction (thermal): Conduction (thermal)

Implementation Method 2

the semiconductor chip may be bonded to the upper surface of the lower substrate and a lower surface of the upper substrate by using a conductive adhesive

Methodology Applied
Scientific EffectConduction (electrical): Conduction (electrical)

Implementation Method 3

using sintering or ultrasonic welding for bonding

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 4

using sintering or ultrasonic welding for bonding

Methodology Applied
Scientific EffectUltrasonic Vibration: Ultrasonic Vibration

Implementation Method 5

maintains chip performance above 200°C, minimizes thermal deformation, and lowers thermal resistance, enhancing heat dissipation efficiency

Methodology Applied
Scientific EffectHeat dissipation: Conduction (thermal)

Data Source

PatentUS11862542B2Dual side cooling power module and manufacturing method of the same
Publication Date: 2024.01.02 HYUNDAI MOBIS CO LTD
  • US11862542B2 patent drawing
  • US11862542B2 patent drawing
  • US11862542B2 patent drawing

AI summary

A dual side cooling power module includes: a lower substrate including a recessed portion on at least one surface thereof, a semiconductor chip formed in the recessed portion, lead frames formed at both ends of the lower substrate, and an upper substrate formed on the semiconductor chip, a portion of the lead frames, and the lower substrate.