Dual-Side Source/Drain Contact Structure for Lower Schottky Barriers

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing contact resistance between source/drain regions and contact structures in semiconductor devices, which hinders performance and efficiency as devices scale down, particularly due to high Schottky barrier heights between materials.

Innovation Solution

The implementation of dual side contact structures with epitaxial source/drain regions and gate structures on finFETs, using n-type and p-type work function metal silicide layers on opposite sides to reduce contact resistance, specifically forming nWFM silicide layers for n-type regions and pWFM silicide layers for p-type regions, thereby aligning work function values with the conduction and valence band energies of the materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional single-side contact structures are used, then manufacturing process is simpler, but contact resistance between source/drain regions and contact structures is high

Engineering Contradiction:
Improvecontact resistanceVSAvoidcontact structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact structure is segmented into two separate contact structures formed on opposite sides of the semiconductor device. Each contact structure independently contacts a source or drain region, dividing the single high-resistance contact path into two lower-resistance paths, thereby reducing overall contact resistance while maintaining manufacturing feasibility

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact structures are extended from a single-side configuration to a dual-side configuration across the semiconductor device. By utilizing the third dimension (depth/thickness) and forming contacts on both top and bottom surfaces, the electrical conduction path is optimized to reduce contact resistance without significantly increasing process complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If device dimensions are scaled down to increase storage capacity and processing speed, then device performance improves, but manufacturing process complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The dual contact structures are formed with predetermined geometries and positions during the manufacturing process. By pre-configuring the contact structures on both sides of the device before final assembly, the need for complex post-processing and alignment procedures is reduced, enabling faster processing speeds while managing manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The contact structure geometry, material composition, and formation parameters are optimized for scaled-down dimensions. By adjusting these parameters specifically for the dual-side configuration, the contact resistance is reduced and device performance is enhanced without proportionally increasing manufacturing process complexity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces contact resistance by approximately 50% to 70%, enhancing the performance of semiconductor devices by improving electrical conduction and efficiency.

Implementation Method 1

n-type and p-type source/drain regions are formed with specific silicide layers (nWFM and pWFM) to reduce Schottky barrier heights

Methodology Applied
Scientific EffectSchottky barrier: Electrical Resistance

Implementation Method 2

the use of epitaxial S/D regions with selective formation of silicide layers on opposite sides of the device to enhance conductivity

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20240204046A1Dual Side Contact Structures In Semiconductor Devices
Publication Date: 2024.06.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240204046A1 patent drawing
  • US20240204046A1 patent drawing
  • US20240204046A1 patent drawing

AI summary

A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.