Dual Surface Finish Package Substrate for High Density Interconnects

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Solution Overview

Problem

Current integrated circuit package substrates face limitations in scalability due to a single surface finish being applied to both the die and land sides, leading to pad-to-pad bridging and constraints on input/output density, as the expansion of the surface finish on the die side does not consider the distinct connection requirements of the die side.

Innovation Solution

Implementing a dual surface finish configuration, where a first surface finish is applied to the land side and a second surface finish, such as direct immersion gold or organic solderability preservative, is applied to the die side, allowing for closer spacing of die interconnect structures and increased input/output density without compromising circuit board connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single surface finish is applied to both die side and land side, then the manufacturing process is simple, but the input/output density is limited due to pad-to-pad bridging

Engineering Contradiction:
Improveinput/output densityVSAvoidsurface finish configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the package substrate into two distinct sides (die side and land side) with different surface finish configurations. The die side uses a first surface finish optimized for die attachment, while the land side uses a second surface finish optimized for circuit board connection, allowing each side to be independently optimized without compromising the other

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different surface finish properties to different locations on the package substrate. The die side receives a surface finish with specific characteristics (e.g., electroless nickel immersion gold) that minimize lateral expansion, while the land side receives a different surface finish (e.g., organic solderability preservative) that meets circuit board connection requirements, thereby optimizing local performance for each function

Inventive Principle:
Principle #3Local quality

2Productivity

If pads are located closely together to increase density, then the input/output density increases, but pad-to-pad bridging occurs due to surface finish lateral expansion

Engineering Contradiction:
Improverouting densityVSAvoidpad connection reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the parameters of the surface finish on the die side by selecting materials and processes (such as electroless nickel immersion gold or direct immersion gold) that exhibit minimal lateral expansion characteristics. This parameter change allows pads to be positioned closer together without the risk of surface finish bridging, thereby increasing routing density while maintaining connection reliability

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the surface finish composition is optimized for circuit board connections, then the land side connection reliability is improved, but the die side connection requirements are not met

Engineering Contradiction:
Improvecircuit board connection reliabilityVSAvoidconnection requirement adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the surface finish requirements by side, allowing the land side to have a surface finish composition specifically optimized for circuit board connections (such as organic solderability preservative) while the die side has a different composition optimized for die attachment. This segmentation enables each side to independently meet its specific connection requirements without compromise

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by applying different surface finish compositions to different sides of the package substrate. The land side receives a surface finish that provides optimal solderability and connection reliability with the circuit board, while the die side receives a surface finish that provides optimal bonding characteristics for the die, thereby meeting the distinct connection requirements of each location

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dual surface finish enables increased input/output density by minimizing lateral expansion of the surface finish on the die side, allowing for closer spacing of interconnect structures and higher routing density, while maintaining reliable connections to the circuit board.

Implementation Method 1

the depositing of the second surface finish is accomplished by a Direct Immersion Gold (DIG) process

Methodology Applied
Scientific EffectDirect Immersion Gold (DIG): Deposition (physical)

Implementation Method 2

the depositing of the second surface finish is accomplished by an Organic Solderability Preservative (OSP) process

Methodology Applied
Scientific EffectOrganic Solderability Preservative (OSP): Deposition (physical)

Data Source

PatentUS11166379B2Integrated circuit package substrate
Publication Date: 2021.11.02 INTEL CORP
  • US11166379B2 patent drawing
  • US11166379B2 patent drawing
  • US11166379B2 patent drawing

AI summary

Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.