Dual-TFT Display Structure for Low-Power Flexible Panels

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Solution Overview

Problem

Current technologies face challenges in manufacturing display devices that can operate with low power consumption, particularly in portable or wearable devices, where energy efficiency is crucial for extended use and performance.

Innovation Solution

The implementation of a display device design that incorporates a first thin-film transistor with a polycrystalline semiconductor layer and a second thin-film transistor with an oxide semiconductor layer, along with a storage capacitor structure that overlaps electrodes, to reduce power consumption and simplify the manufacturing process by forming openings and contact holes through the same process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If current manufacturing technology is used, then display devices can be produced, but power consumption is high and cannot be reduced to meet portable device requirements

Engineering Contradiction:
Improvepower consumptionVSAvoidmanufacturing capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent segments the transistor population into two groups: first thin-film transistors with polycrystalline semiconductor layers for switching functions, and second thin-film transistors with oxide semiconductor layers for driving functions. This segmentation allows each transistor type to be optimized for its specific function, with oxide semiconductors providing lower leakage current for reduced power consumption while polycrystalline semiconductors provide high mobility for switching performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using different semiconductor materials in different locations based on functional requirements. Oxide semiconductor layers are placed in regions requiring low leakage current (driving transistors), while polycrystalline semiconductor layers are placed in regions requiring high switching speed. This localized material optimization enables reduced overall power consumption while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If multiple types of transistors with different semiconductor layers are used, then power consumption is reduced, but manufacturing process complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidmanufacturing process
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges the formation processes of openings and contact holes into a single etching step. By designing openings in the bending area to have the same depth as contact holes in the active area, both structures can be formed simultaneously through one etching process, eliminating the need for separate mask and etch steps. This merging significantly simplifies the manufacturing process despite using multiple transistor types.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal opening structures that serve multiple functions: they act as both openings for the bending area flexibility and as contact holes for electrical connections. This multi-functionality is achieved by making openings and contact holes the same depth, allowing a single process to create structures that fulfill both mechanical flexibility requirements and electrical connection requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If openings in bending area are formed to the same depth as contact holes, then manufacturing process is simplified, but structural precision requirements increase

Engineering Contradiction:
Improvemanufacturing processVSAvoidopening depth consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the depth parameter of openings in the bending area to match the depth of contact holes in the active area. This parameter alignment allows both structures to be formed by the same etching process with the same process conditions, simplifying manufacturing. The consistent depth parameter ensures that flexibility and electrical connection requirements are both met without requiring additional precision steps.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11871618B2Display device having multiple transistors
Publication Date: 2024.01.09 LG DISPLAY CO LTD
  • US11871618B2 patent drawing
  • US11871618B2 patent drawing
  • US11871618B2 patent drawing

AI summary

Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. A second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor.