Dual Work Function Gate Stacks for CMOS Threshold Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in semiconductor device fabrication is to independently control the threshold voltages of N-channel and P-channel transistors while preventing variations in the effective work function of the gate stack during subsequent processes, particularly with the use of high-k materials that cause Fermi level pinning and complexity in forming dual work function metal gate electrodes.

Innovation Solution

The solution involves forming dual work function gate stacks with nitrogen-rich and titanium-rich metal nitride layers, where the effective work function is adjusted by incorporating specific species like nitrogen and titanium, and using an anti-reaction layer to prevent intermixing and oxidation, allowing for independent control of threshold voltages through precise etching and annealing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-k material is used as gate dielectric layer, then gate leakage is reduced and transistor performance is improved, but Fermi level pinning effect occurs causing threshold voltage increase

Engineering Contradiction:
Improvegate leakageVSAvoidthreshold voltage control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A metal containing layer with effective work function adjust species (such as titanium, nitrogen, or their compounds like TiN, TiNx, TaN, TaNx) is introduced as an intermediary between the high-k gate dielectric layer and the gate electrode. This intermediate layer modulates the work function and prevents direct contact between the high-k material and polysilicon gate electrode, thereby eliminating Fermi level pinning while maintaining the low gate leakage benefits of high-k materials.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The effective work function of the gate stack is dynamically adjusted by controlling the concentration and type of effective work function adjust species in the metal containing layer. By varying parameters such as titanium content, nitrogen content, or the specific compound used (TiN, TiNx, TaN, TaNx), the effective work function can be precisely tuned to achieve desired threshold voltages for both N-channel and P-channel transistors without suffering from Fermi level pinning.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If dual work function metal gate electrodes are formed, then independent threshold voltage control for N-channel and P-channel transistors is achieved, but fabrication complexity and cost increase

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of forming separate metal gate electrodes for N-channel and P-channel transistors, a single metal containing layer with effective work function adjust species is formed over the entire gate dielectric layer. This unified approach allows both N-channel and P-channel transistors to share the same gate electrode structure while achieving independent threshold voltage control through spatially varying concentrations of effective work function adjust species, thereby simplifying the fabrication process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The metal containing layer is engineered with locally varying properties - different concentrations of effective work function adjust species (titanium, nitrogen, or their compounds) are introduced in different regions corresponding to N-channel and P-channel transistor locations. This local variation in composition allows independent threshold voltage control for each transistor type while maintaining a single, integrated gate electrode structure that simplifies fabrication.

Inventive Principle:
Principle #3Local quality

3Speed

If gate dielectric layer thickness is reduced to improve transistor performance, then device speed is improved, but gate leakage increases

Engineering Contradiction:
Improvetransistor performanceVSAvoidgate leakage
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The gate dielectric structure is formed as a composite system combining a high-k material layer (such as HfO2, HfSiO, HfSiON, or other metal oxides with dielectric constant greater than SiO2) with a metal containing layer having effective work function adjust species. This composite structure enables the use of thinner equivalent oxide thickness while maintaining low gate leakage through the high-k material's superior dielectric properties, and simultaneously controls threshold voltage through the metal containing layer's work function modulation.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables independent control of threshold voltages for N-channel and P-channel transistors, stabilizing the effective work function and reducing fabrication complexity, thereby improving the performance and reliability of CMOS devices.

Implementation Method 1

forming a metal containing layer, containing an effective work function adjust species, over the gate dielectric layer; increasing an amount of the effective work function adjust species contained in the metal containing layer

Methodology Applied
Scientific EffectWork function adjustment:

Implementation Method 2

forming an anti-reaction layer over the metal containing layer

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 3

forming, on the substrate, a gate stack by etching the anti-reaction layer, the metal containing layer, and the gate dielectric layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 4

increasing an amount of the effective work function adjust species contained in the metal containing layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS9230963B2Semiconductor device with dual work function gate stacks and method for fabricating the same
Publication Date: 2016.01.05 SK HYNIX INC
  • US9230963B2 patent drawing
  • US9230963B2 patent drawing
  • US9230963B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming a gate dielectric layer over a substrate; forming a metal containing layer, containing an effective work function adjust species, over the gate dielectric layer; forming an anti-reaction layer over the metal containing layer; increasing an amount of the effective work function adjust species contained in the metal containing layer; and forming, on the substrate, a gate stack by etching the anti-reaction layer, the metal containing layer, and the gate dielectric layer.