Dummy Bumps for TSV Continuity Testing in Stacked Chips
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Solution Overview
Problem
In semiconductor devices with multilayer structures of stacked chips through TSVs, detecting connection failures or defects between chips is inefficient and can lead to entire product defects if identified after assembly, requiring a method to detect defects early and improve yield.
Innovation Solution
The semiconductor device incorporates dummy bumps and wirings that form a single electrical path between chips, allowing for the detection of defects within this path without affecting normal operation, enabling early detection of connection failures or defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuity test is performed for every TSV after assembly, then connection reliability is ensured, but manufacturing time and cost increase significantly
Solution Approach 1:
The patent applies preliminary action by performing continuity tests on TSVs before the final assembly step. Test terminals are provided on intermediate substrates to enable testing of TSVs in semiconductor chips mounted on the substrate, allowing defects to be detected and addressed before complete product assembly, thus maintaining reliability while improving manufacturing efficiency
2Difficulty of detecting and measuring
If test terminal is provided on each TSV, then individual connection testing is enabled, but device complexity increases
Solution Approach 1:
The patent applies universality by providing test terminals on the intermediate substrate that can serve multiple testing functions. The test terminals enable continuity testing for multiple TSVs simultaneously and can be used for various types of electrical measurements, reducing the need for separate testing structures for each TSV and thereby reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases product yield by allowing for early detection of defects in the semiconductor device's conduction paths, preventing product defects and ensuring reliable connections between chips.
Implementation Method 1
the first wirings, the first bumps, the second wirings, and the second bumps constitute a single electrical path
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3A~3B
AI summary
In a semiconductor device in which semiconductor chips having a number of signal TSVs are stacked, a huge amount of man-hours have been required to perform a continuity test for each of the signal TSVs. According to the present invention, no continuity test is performed directly on signal TSVs. Dummy bumps are arranged in addition to signal TSVs. The dummy bumps of the semiconductor chips are connected through a conduction path that can pass the dummy bumps between the semiconductor chips with one stroke when the semiconductor chips are stacked. A continuity test of the conduction path allows a bonding defect on bonded surfaces of two of the stacked semiconductor chips to be measured and detected.