Dummy Component Layout for Semiconductor Overlap Measurement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In semiconductor manufacturing, the compact arrangement of devices makes it difficult to directly measure the overlapping state between components, leading to delays in defect reflection and decreased yields.

Innovation Solution

A layout for measuring overlapping states is introduced, featuring a layout region with a first dummy active area region and multiple dummy component regions, allowing for the formation of a specific overlapping region without other dummy components, enabling instant measurement of the overlapping state between dummy components and active areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the arrangement of semiconductor devices becomes more compact, then the device density and integration are improved, but the ability to directly measure the overlapping state between components deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidmeasurement of overlapping state
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The patent divides the measurement function into two parts: dummy components that are easily measurable and actual device components. The dummy components are specifically designed with larger dimensions and simpler structures to enable easy measurement of overlapping states, while the actual devices maintain compact arrangements. This segmentation allows measurement capabilities to be preserved without compromising device density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dummy components as intermediary elements between the measurement system and the actual compact devices. These dummy components serve as proxies that replicate the overlapping relationships of the actual devices but with dimensions suitable for measurement. By measuring the dummy components, one can infer the overlapping state of the compact devices without directly measuring them.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If direct measurement of device area is performed using high-voltage electron beam, then measurement precision is improved, but harmful effects on the device increase

Engineering Contradiction:
Improveoverlapping state measurementVSAvoiddamage from high-voltage electron beam
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent creates dummy components that are copies or replicas of the actual device components in terms of their overlapping relationships. These dummy copies are designed with dimensions and structures that make them suitable for high-voltage electron beam measurement. By measuring the dummy copies instead of the actual devices, one obtains the necessary measurement precision without exposing the valuable devices to harmful electron beam effects.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The dummy components can be viewed as disposable or sacrificial elements that are specifically designed for measurement purposes. They absorb the harmful effects of high-voltage electron beam measurement, protecting the actual devices. The dummy components are replaced or reconfigured for different measurement needs, serving as a protective buffer between the measurement tool and the valuable devices.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS11367718B1Layout for measuring overlapping state
Publication Date: 2022.06.21 WINBOND ELECTRONICS CORP
  • US11367718B1 patent drawing
  • US11367718B1 patent drawing
  • US11367718B1 patent drawing

AI summary

A layout for measuring an overlapping state includes a layout region, a first dummy active area region, and dummy component regions. The first dummy active area region is located in the layout region. The dummy component regions are stacked in the layout region. At the moment when one of the dummy component regions is formed on the first dummy active area region, the one of the dummy component regions and the first dummy active area region have a first overlapping region, and the first overlapping region does not include other dummy component regions among the dummy component regions.