Dummy Gate Etching with Dual RF Plasma for Uniform Polysilicon

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Solution Overview

Problem

Defects in dummy gate structures of fin-based transistors can transfer to metal gate structures, leading to reduced performance and increased device failures, such as leakage and shorting.

Innovation Solution

A dual radio frequency (RF) source etch technique is used to form a dummy gate structure from a crystallized polysilicon layer, increasing the directionality of ions and radicals in the plasma, which enhances etch rate uniformity and reduces line width roughness (LWR).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dummy gate structure is formed using conventional etching techniques, then the metal gate structure can be created, but defects transfer to the metal gate structure leading to reduced performance and increased device failures

Engineering Contradiction:
Improvedevice reliabilityVSAvoiddummy gate structure precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the physical and chemical parameters of the etching process by implementing a dual RF source system with independent frequency control. By optimizing RF power distribution between the two sources and controlling plasma chemistry parameters, the etching process achieves superior uniformity and precision in forming the dummy gate structure, preventing defect formation that would otherwise transfer to the metal gate structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic control mechanisms in the dual RF source etching system, allowing real-time adjustment of RF power levels and plasma conditions during the etching process. This dynamic optimization enables precise control over the etching rate and profile, ensuring high manufacturing precision of the dummy gate structure while maintaining process stability.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If conventional single RF source etching is used, then the process is simpler, but etch rate uniformity is poor and line width roughness increases

Engineering Contradiction:
Improveetch rate uniformityVSAvoidetching system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the single RF source into two independent RF sources, each capable of operating at different frequencies and power levels. This segmentation allows independent optimization of plasma generation and ion bombardment processes, achieving superior etch rate uniformity and reduced line width roughness. The segmented approach enables precise control over the etching front while managing the increased system complexity through modular design.

Inventive Principle:
Principle #1Segmentation

3Reliability

If etch rate uniformity is poor, then manufacturing is faster, but line width roughness increases causing gate-to-source/drain shorts

Engineering Contradiction:
Improvegate structure reliabilityVSAvoidetching efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent optimizes multiple etching parameters simultaneously through the dual RF source system, including RF power distribution, gas flow rates, and pressure conditions. By carefully balancing these parameters, the process achieves both high etch rate uniformity and maintained productivity, preventing gate-to-source/drain shorts while avoiding excessive process time.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dual RF source etch technique improves the uniformity of the etching process, reducing the likelihood of defects in the metal gate structure and enhancing the performance and yield of fin-based transistors by minimizing LWR and preventing gate-to-source/drain shorts.

Implementation Method 1

A dual radio frequency (RF) source etch technique is used to form a dummy gate structure from a crystallized polysilicon layer, increasing the directionality of ions and radicals in the plasma

Methodology Applied
Scientific EffectPlasma: Plasma

Data Source

PatentUS12243929B2Forming a dummy gate structure
Publication Date: 2025.03.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12243929B2 patent drawing
  • US12243929B2 patent drawing
  • US12243929B2 patent drawing

AI summary

A dummy gate structure may be formed for a semiconductor device. The dummy gate structure may be formed from an amorphous polysilicon layer. The amorphous polysilicon layer may be deposited in a blanket deposition operation. An annealing operation is performed for the semiconductor device to remove voids, seams, and/or other defects from the amorphous polysilicon layer. The annealing operation may cause the amorphous polysilicon layer to crystallize, thereby resulting in the amorphous polysilicon layer transitioning into a crystallized polysilicon layer. A dual radio frequency (RF) source etch technique may be performed to increase the directionality of ions and radicals in a plasma that is used to etch the crystallized polysilicon layer to form the dummy gate structure. The increased directionality of the ions increases the effectiveness of the ions in etching through the different crystal grain boundaries which increases the etch rate uniformity across the crystallized polysilicon layer.