Dummy Gate Electrode Segmentation for FinFET Fabrication
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into a given area, including issues with dummy gate residue defects and channel-top damage during the formation of FinFETs, which affect production yields and device performance.
Innovation Solution
A method involving a complex dummy gate material layer with different etch rates for top and bottom portions, protected by top and bottom spacers, allows for precise patterning and recessing of dummy gate electrodes and source/drain regions, minimizing defects and channel-top damage, and enabling high-yield fabrication of FinFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but dummy gate residue defects and channel-top damage occur during FinFET formation
Solution Approach 1:
The dummy gate electrode is segmented into top and bottom portions with different materials and etch rates. The top portion uses a first dummy gate material while the bottom portion uses a second dummy gate material, allowing selective removal during patterning processes to prevent residue defects
Solution Approach 2:
Different regions of the dummy gate electrode are assigned different material properties. The top portion has different etch characteristics than the bottom portion, enabling localized control over material removal during etching processes to eliminate residue while protecting channel-top
2Reliability
If complex dummy gate material layer with different etch rates is used, then dummy gate residue defects are reduced, but device complexity increases
Solution Approach 1:
The complex dummy gate material layer with different etch rates is formed in advance during the gate electrode formation process. This preliminary structuring enables subsequent selective removal patterns without requiring additional complex process steps
Solution Approach 2:
The multi-material dummy gate structure serves as an intermediary that facilitates the patterning process. By using materials with different etch rates, the dummy gate acts as a self-differentiating structure that guides subsequent etching to remove only desired portions while protecting critical regions
3Object-affected harmful factors
If top and bottom spacers are used to protect dummy gate electrodes, then channel-top damage is prevented, but manufacturing precision requirements increase
Solution Approach 1:
Top and bottom spacers are formed in advance to establish protective structures around the dummy gate electrode. These spacers are deposited and patterned beforehand to define precise boundaries that protect the channel-top region during subsequent etching and patterning operations
Solution Approach 2:
The spacers act as intermediary protective structures that mediate between the patterning tools and the sensitive channel-top region. They provide a buffer zone that enables precise pattern transfer while physically protecting the underlying channel structure from damage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances production yields and device performance by preventing channel-top damage, reducing dummy gate residue defects, and allowing for precise control of critical dimensions in metal gate electrodes, leading to improved semiconductor device fabrication.
Implementation Method 1
a top spacer along sidewalls of the top portion of the dummy gate electrode... a bottom spacer along a sidewall of the opening... different etch rates for top and bottom portions
Data Source
AI summary
Semiconductor devices and methods of forming are described herein. The methods include depositing a dummy gate material layer over a fin etched into a substrate. A gate mask is then formed over the dummy gate material layer in a channel region of the fin. A dummy gate electrode is etched into the dummy gate material using the gate mask. A top spacer is then deposited over the gate mask and along sidewalls of a top portion of the dummy gate electrode. An opening is then etched through the remainder of the dummy gate material and through the fin. A bottom spacer is then formed along a sidewall of the opening and separates a bottom portion of the dummy gate electrode from the opening. A source/drain region is then formed in the opening and the dummy gate electrode is replaced with a metal gate stack.