Dummy Gate Structure for Fin DRAM Electrical Isolation

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Solution Overview

Problem

In dynamic random access memory (DRAM) cells with finFET access transistors, the probability of electrical shorts increases between neighboring source and drain regions due to the dimensions of semiconductor fins and capacitors, which affects the areal density and reliability of memory devices.

Innovation Solution

The formation of trench capacitors between the lengthwise sidewalls of semiconductor fins, with a dummy gate structure between neighboring fins to limit the lateral extent of raised source and drain regions, preventing electrical shorts, and the use of gate spacers and replacement gate structures to ensure proper electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the dimensions of semiconductor fins and capacitors are reduced to increase areal density, then the areal density is improved, but the probability of electrical shorts between neighboring source and drain regions increases

Engineering Contradiction:
Improveareal densityVSAvoidelectrical isolation
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention introduces dummy gate structures as separate isolation elements positioned between neighboring fins. These dummy gates segment the continuous semiconductor surface, creating distinct electrical zones that prevent current leakage between adjacent source and drain regions, thereby resolving the electrical shorting issue while maintaining high areal density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dummy gate structures serve as intermediary elements between neighboring fins and source/drain regions. These intermediate structures provide electrical isolation without interfering with the functional operation of the memory device, acting as mediators that prevent harmful electrical interactions while allowing the device to maintain high density

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If dummy gate structures are added to prevent electrical shorts, then the electrical isolation is improved, but the device complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy gate structures are merged with the existing gate structure formation process. The same dielectric and conductive layers used for functional gates are also deposited and patterned to form dummy gates, combining multiple functions into a single integrated process flow that minimizes additional complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The dummy gate structures utilize the same materials and fabrication processes as the functional gate structures, making them multi-functional elements that serve both as isolation barriers and as part of the overall gate network. This universality reduces the need for separate processing steps and materials

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If selective epitaxy is used to form raised source and drain regions, then the manufacturing precision is improved, but the lateral extent control becomes more difficult leading to potential electrical shorts

Engineering Contradiction:
Improvesource and drain region formationVSAvoidlateral extent of raised regions
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The dummy gate structures are formed before the selective epitaxy process to define the lateral boundaries of raised source and drain regions. This preliminary action establishes physical barriers that constrain the lateral growth of epitaxial regions, preventing them from extending too far and causing electrical shorts while maintaining the precision benefits of selective epitaxy

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents electrical shorts between neighboring fins, enhancing the areal density and reliability of DRAM devices by controlling the growth of raised source and drain regions and ensuring proper electrical isolation.

Implementation Method 1

raised source and drain regions that are formed by selective epitaxy of a semiconductor material

Methodology Applied
Scientific EffectSelective epitaxy: Epitaxy

Data Source

PatentUS9741722B2Dummy gate structure for electrical isolation of a fin DRAM
Publication Date: 2017.08.22 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9741722B2 patent drawing
  • US9741722B2 patent drawing
  • US9741722B2 patent drawing

AI summary

Trench capacitors can be formed between lengthwise sidewalls of semiconductor fins, and source and drain regions of access transistors are formed in the semiconductor fins. A dummy gate structure is formed between end walls of a neighboring pair of semiconductor fins, and limits the lateral extent of raised source and drain regions that are formed by selective epitaxy. The dummy gate structure prevents electrical shorts between neighboring semiconductor fins. Gate spacers can be formed around gate structures and the dummy gate structures. The dummy gate structures can be replaced with dummy replacement gate structures or dielectric material portions, or can remain the same without substitution of any material. The dummy gate structures may consist of at least one dielectric material, or may include electrically floating conductive material portions.