Dummy Moat Silicide Block Layer for High-Voltage Isolation
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Solution Overview
Problem
Conventional shallow trench isolation (STI) methods for semiconductor devices, particularly in high-voltage applications, face challenges in generating stable and impermeable isolation regions due to issues with dummy moat generation, leading to potential voltage breakdowns and shorts across junctions.
Innovation Solution
The introduction of a dummy silicide block layer mask allows selected dummy moat regions to remain non-silicided, preventing voltage breakdowns and enabling the generation of dummy moats closer to junctions without compromising junction breakdown voltage, using an algorithm to determine the size and position of the block layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dummy moats are generated using conventional STI-CMP methods, then CMP uniformity is improved, but junction breakdown voltage is reduced due to silicided dummy moats creating breakdown pathways
Solution Approach 1:
The patent segments the dummy moat structure into two functional parts: the moat region itself and the silicide blocking layer. This segmentation allows the moat to provide CMP uniformity while the blocking layer prevents silicidation, eliminating the breakdown pathway issue. The dummy moat is divided from the active region by the isolation trench, and the silicide block layer is selectively applied only to the dummy moat regions.
Solution Approach 2:
The silicide blocking layer acts as an intermediary between the dummy moat and the silicidation process. This intermediate layer prevents direct contact between the silicide-forming metal and the dummy moat semiconductor material, thereby blocking the formation of low-barrier silicided regions that would create breakdown pathways while still allowing the dummy moat to serve its CMP uniformity function.
2Reliability
If dummy moats are kept far from junctions (12 μm exclusion zone), then junction breakdown voltage is maintained, but moat density is reduced causing STI-CMP process issues
Solution Approach 1:
The patent extracts the harmful silicidation property from the dummy moat structure by applying the silicide blocking layer. This extraction allows the dummy moat to retain its beneficial CMP uniformity function while removing the harmful breakdown pathway creation. Consequently, the exclusion zone can be reduced or eliminated because the dummy moat no longer poses a threat to junction breakdown voltage.
Solution Approach 2:
The silicide blocking layer is applied selectively only to the dummy moat regions, not to the active regions. This local application creates different properties in different locations: dummy moat regions have the blocking layer to prevent silicidation, while active regions remain silicided for proper device function. This local quality differentiation resolves the contradiction by allowing high moat density near junctions without compromising breakdown voltage.
3Manufacturing precision
If dummy moats are generated with larger area to improve CMP uniformity, then CMP process quality is improved, but more dummy moats are silicided increasing breakdown risk
Solution Approach 1:
The silicide blocking layer is applied to the dummy moat regions before the silicidation process occurs. This preliminary protective action prevents the harmful silicidation from taking place in the first place. By pre-applying the blocking layer, the patent eliminates the possibility of breakdown pathway formation while allowing the dummy moats to be generated with larger areas for improved CMP uniformity.
Data Source
AI summary
Devices and methods are presented to fabricate dummy moats in an isolation region on a substrate. Presently, dummy moats are prone to losing impedance after the silicidation process. In high-voltage devices, silicided dummy moats reduce the breakdown voltage between active regions, particularly when the dummy moat overlaps or is in close proximity to a junction. The present devices and methods disclose a dummy moat covered with an oxide layer. During the silicidation process, the dummy moat and other designated isolation regions remain non-silicided. Thus, high and stable breakdown voltages are maintained.