Dummy Data Preamble for DC-Balanced Link Startup Noise

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Solution Overview

Problem

As data transmission speeds increase, existing DC balance coding systems like 8B/10B face challenges in minimizing Simultaneous Switching Noise (SSN) caused by parasitic inductances, which can degrade signal quality and system performance.

Innovation Solution

Incorporating a preamble of dummy data that creates an intermediate level of SSN, either fixed or variable, to precede the DC balance encoded data, thereby reducing the noise generated by the initial word of data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DC balance coding is used to encode data for transmission, then clock recovery and DC balance are achieved, but Simultaneous Switching Noise (SSN) is generated due to current variations from parasitic inductances

Engineering Contradiction:
Improveclock recoveryVSAvoidSimultaneous Switching Noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A preamble consisting of a specific number of logic zero bits is transmitted before the actual data to pre-charge or pre-discharge the parasitic inductances. This preliminary action reduces the current variation when the first data word is transmitted, thereby reducing SSN while maintaining DC balance coding benefits for clock recovery

Inventive Principle:
Principle #10Preliminary action

2Object-generated harmful factors

If the number of logic zero bits in the preamble is increased to reduce SSN, then current variations are minimized, but transmission time increases

Engineering Contradiction:
Improvecurrent variationsVSAvoidtransmission time
Core Design Contradiction:
Object-generated harmful factorsVSLoss of time

Solution Approach 1:

The number of logic zero bits in the preamble is optimized to a specific value (e.g., 6 bits for 8B/10B coding) that provides sufficient SSN reduction without excessive transmission time. This parameter is chosen based on the balance between reducing current variation and minimizing the overhead time

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If a fixed preamble is used to reduce SSN, then implementation is simplified, but adaptability to different data patterns is reduced

Engineering Contradiction:
Improveimplementation simplicityVSAvoidadaptability to data patterns
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

A fixed preamble with a uniform number of logic zero bits is used regardless of the data pattern. This homogeneous approach simplifies the transmitter design and implementation while providing consistent SSN reduction performance across different data scenarios

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS7768429B2Transmitting/receiving methods and systems for data with simultaneous switching noise reducing preambles
Publication Date: 2010.08.03 SAMSUNG ELECTRONICS CO LTD
  • US7768429B2 patent drawing
  • US7768429B2 patent drawing
  • US7768429B2 patent drawing

AI summary

DC balance encoded data is transmitted by transmitting a preamble of dummy data that is configured to provide an intermediate number of bits of a given logic value that is at least one bit of the given logic value but less than a maximum number of bits of the given logic value in the DC balance encoded data, to thereby reduce the simultaneous switching noise that is caused by transmission of a first word of DC balance encoded data. The preamble may contain one or more words of fixed and/or variable dummy data.