Dummy TSV Decoupling Capacitors for Low-Inductance IC Power Delivery
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Solution Overview
Problem
Off-chip decoupling capacitors are inadequate for high-speed microprocessor applications due to long inductance paths, leading to time delays and limited capacitive decoupling, while integrated chip capacitors compete for valuable die area and provide insufficient capacitive decoupling.
Innovation Solution
The implementation of decoupling capacitors based on dummy through-silicon-vias (TSVs) within the IC structure, where a first capacitor electrode lines the sidewalls and bottom of an opening in the support structure, a dielectric insulator is used between the electrodes, and a second capacitor electrode fills the opening, allowing for efficient capacitive decoupling close to high-frequency circuits without occupying additional die area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If off-chip decoupling capacitors are used, then capacitive decoupling is provided, but long inductance paths cause time delays and reduced effectiveness for high-speed applications
Solution Approach 1:
The patent merges the decoupling capacitor with the TSV structure by forming capacitor electrodes on the sidewalls and bottom of the TSV opening, integrating two functions (decoupling and via formation) into a single structure, thereby reducing inductance path length while providing effective capacitive decoupling
2Reliability
If integrated chip capacitors are placed within circuit elements, then capacitive decoupling is provided close to switching circuits, but valuable die area is consumed
Solution Approach 1:
The TSV structure serves multiple functions: it provides electrical interconnection between layers and simultaneously forms a decoupling capacitor using its sidewalls and bottom, eliminating the need for separate capacitor structures and preserving die area for circuit elements
Solution Approach 2:
The capacitor electrodes are nested within the TSV opening structure, with the first electrode on the sidewalls and bottom, and the second electrode filling the opening, creating a compact capacitor that utilizes the existing TSV footprint without additional die area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces inductance and enhances capacitive decoupling near high-frequency circuits, addressing the limitations of off-chip capacitors and optimizing die area usage, thereby supporting high-frequency operations without increasing die size.
Implementation Method 1
the capacitor insulator is a liner of a capacitor insulator material on sidewalls and a bottom of the opening in the support structure lined with the first electrically conductive material
Data Source
AI summary
Disclosed herein are IC structures with one or more decoupling capacitors based on dummy TSVs provided in a support structure. An example decoupling capacitor includes first and second capacitor electrodes and a capacitor insulator between them. The first capacitor electrode is a liner of a first electrically conductive material on sidewalls and a bottom of an opening in the support structure, the opening in the support structure extending from the first side towards, but not reaching, the second side. The capacitor insulator is a liner of a dielectric material on sidewalls and a bottom of the opening in the support structure lined with the first electrically conductive material. The second capacitor electrode is a second electrically conductive material filling at least a portion of the opening in the support structure lined with the first electrically conductive material and with the dielectric material.