Dummy Wiring Configuration for Copper Interconnect Void Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device manufacturing lies in achieving optimal impurity concentration in copper wiring films to prevent void formation and ensure reliable electrical conductivity, as high impurity concentrations lead to conduction failures and low impurity concentrations result in microvoids and reduced stress migration reliability.
Innovation Solution
The introduction of first and second dummy wirings with specific widths and pattern coverage ratios in defined areas near plug connecting parts, which control the impurity concentration and film forming speed during electrolytic plating, allowing for the formation of copper wiring films with balanced impurity distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high impurity concentration is used in Cu film, then embedding property and surface evenness are improved, but voids form during heat treatment causing conduction failure
Solution Approach 1:
The patent applies local quality by creating two distinct regions with different dummy wiring configurations: a first region near the plug connecting part with larger width dummy wirings to suppress void formation, and a second region away from the plug with smaller width dummy wirings to control impurity concentration. This spatial differentiation allows each region to have optimized properties for its specific function.
Solution Approach 2:
The patent segments the wiring structure by dividing it into a plug connecting part and a non-plug connecting part, with different dummy wiring arrangements in each segment. The first dummy wirings are disposed only in the first region near the plug, while the second dummy wirings are disposed in the second region away from the plug, creating segmented control over impurity distribution and void prevention.
2Stability of the object's composition
If low impurity concentration is used in Cu film, then uniform crystal structure is achieved, but microvoids spread quickly reducing stress migration reliability
Solution Approach 1:
The patent creates local quality variations by implementing different dummy wiring configurations in different regions: the first region near the plug has larger dummy wirings that suppress microvoid formation and control impurity concentration, while the second region has smaller dummy wirings that maintain uniform crystal structure. This allows each region to have properties optimized for its specific requirements.
Solution Approach 2:
The patent applies preliminary action by forming dummy wirings before the Cu film deposition process. These pre-formed dummy wirings serve as templates that control the subsequent impurity distribution and crystal growth during electrolytic plating, preventing microvoid formation before it can occur during heat treatment or stress migration.
3Reliability
If dummy patterns are formed to surround via holes, then void formation in portions below via holes is prevented, but device complexity increases
Solution Approach 1:
The patent applies local quality by forming dummy wirings only in specific regions where they are most needed: the first dummy wirings are placed only in the first region near the plug connecting part where void formation is most critical, while the second dummy wirings are placed in the second region with different dimensions. This targeted approach prevents voids without unnecessarily complicating the entire device structure.
Solution Approach 2:
The patent uses partial action by implementing dummy wirings with different widths and patterns in different regions rather than uniformly across the entire structure. The first dummy wirings have larger widths for void suppression in critical areas, while the second dummy wirings have smaller widths for impurity control in non-critical areas, optimizing the balance between effectiveness and complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the initial electric properties and reliability of stress migration by controlling impurity concentration and film forming speed, reducing void formation and improving mechanical strength of the interlayer insulating film.
Implementation Method 1
an electrolytic plating method is extensively used. To a plating solution used for the electrolytic plating are mixed prescribed amounts of, for example, additives such as an accelerator, a suppressor and a leveler in addition to Cu ions
Data Source
AI summary
A semiconductor device, has a semiconductor substrate; a first insulating film which is disposed above the semiconductor substrate; a second insulating film which is disposed above the first insulating film; a wiring which is disposed in the first insulating film and has a plug connecting part; a plug which is disposed in the second insulating film and connected to the plug connecting part; a plurality of first dummy wirings which are disposed in a first area near the plug connecting part in the first insulating film; and a plurality of second dummy wirings which are disposed in a second area near the wiring excepting the plug connecting part in the first insulating film, and have at least either a width smaller than that of the first dummy wirings or a pattern coverage ratio larger than that of the first dummy wirings.