Duobinary Backplane Signaling for High-Speed Signal Integrity
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Solution Overview
Problem
Maintaining signal integrity for gigahertz-speed data transmission on high-speed backplanes is challenging due to severe frequency-response roll-off and high power consumption in existing solutions, particularly with passive and active techniques, which often require costly materials and complex circuits.
Innovation Solution
The implementation of duobinary signaling architecture, which reshapes the data spectrum using a duobinary precoder, equalizing filter, and duobinary-to-binary converter to reduce bandwidth and simplify integration, effectively addressing signal integrity issues by reducing power consumption and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive solutions use high-quality microwave substrate materials and special high-bandwidth backplane connectors, then transmission characteristics improve, but cost increases
Solution Approach 1:
The patent changes the signaling parameters by using duobinary signaling instead of conventional NRZ signaling. This parameter change allows standard backplane materials and connectors to achieve performance levels previously requiring expensive microwave substrates, thereby improving transmission characteristics without increasing cost.
2Reliability
If active solutions use adaptive equalization and pre-emphasis to correct entire NRZ data bandwidth, then signal integrity improves for long trace lengths, but power consumption increases
Solution Approach 1:
The patent changes the bandwidth parameter by using duobinary signaling which compresses the data spectrum. This reduces the frequency range that requires equalization, allowing simpler, lower-power active circuits to achieve the same signal integrity improvement compared to conventional NRZ equalization that must cover the entire NRZ bandwidth.
Solution Approach 2:
By using duobinary signaling, the patent applies equalization only to the reduced bandwidth necessary for duobinary transmission rather than the full NRZ bandwidth. This partial action approach achieves sufficient signal integrity correction with reduced power consumption.
3Reliability
If active solutions use PAM-4 with equalization to compress bandwidth, then performance over long traces improves, but device complexity and power consumption increase
Solution Approach 1:
The patent changes the signaling parameter from PAM-4 (4 levels) to duobinary (3 levels), reducing the complexity of the equalization and detection circuits while still achieving bandwidth compression. This parameter change maintains long-trace performance with significantly reduced device complexity compared to PAM-4 implementations.
4Device complexity
If conventional NRZ signaling is used on electrical backplanes, then implementation is simple, but signal integrity deteriorates due to severe frequency-response roll-off
Solution Approach 1:
The patent changes the signaling parameter from conventional NRZ to duobinary signaling. This parameter change inherently compresses the bandwidth and shapes the spectrum to be more tolerant of the severe frequency-response roll-off characteristic of electrical backplanes, thereby improving signal integrity while maintaining reasonable implementation complexity through the use of a precoder and converter.
Data Source
AI summary
A (binary) signal is transmitted through an electrical backplane, and the received signal is interpreted as a duobinary signal. In order to ensure that the received signal can be properly interpreted as a duobinary signal, the data signal is preferably filtered prior to being interpreted. The filter is preferably designed such that the combination of filter and the backplane approximates a binary-to-duobinary converter. In one embodiment, an (FIR-based) equalizing filter is applied to the data signal prior to transmission to emphasize the high-frequency components and flatten the group delay of the backplane. The resulting, received duobinary signal is converted into a binary signal by (1) splitting the duobinary signal, (2) applying each copy to a suitably thresholded comparator, and (3) applying the comparator outputs to a suitable (e.g., XOR) logic gate. The transmission system enables high-speed data (e.g., greater than 10 Gb/s) to be transmitted over relatively inexpensive electrical backplanes.