DUT Measurement Circuit Timing for Harmonic-Minimized Impedance Sensing
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Solution Overview
Problem
In battery management systems, existing measurement circuits face challenges in accurately determining battery impedance due to signal-to-noise ratio (SNR) issues caused by excitation and sampling operations, which introduce or fail to manage harmonics and aliasing, leading to inaccurate parameters for battery management operations.
Innovation Solution
A circuit and method that generate an excitation signal with a target frequency and adjust sampling control parameters to minimize harmonics, using a combination of a clock circuit, driver circuit, analog-to-digital converter, and control circuit to optimize the period of excitation, update, and digitization frequencies, and select sense signal samples to improve SNR and accuracy of impedance measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If excitation and sampling operations are performed to obtain voltage and current measurements, then measurement capability is improved, but harmonics and aliasing are introduced which reduces signal-to-noise ratio and measurement accuracy
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing optimal sampling instances in a lookup table before measurements are taken. The microcontroller queries this pre-computed table to determine when to sample, avoiding the need for complex real-time calculations and ensuring harmonics are minimized from the outset. This preparatory step eliminates harmonics before they can corrupt the measurements.
Solution Approach 2:
The patent implements feedback by continuously monitoring the excitation frequency and adjusting the sampling rate dynamically. The system measures the actual excitation frequency, compares it against ideal values, and modifies the sampling rate accordingly to maintain optimal sampling instances. This closed-loop feedback ensures that measurements remain accurate even when excitation frequency drifts occur.
2Measurement precision
If sampling rate is increased to improve measurement accuracy, then signal-to-noise ratio is improved, but harmonics and aliasing effects are exacerbated
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the sampling rate based on the excitation frequency. Instead of using a fixed high sampling rate that always introduces harmonics, the system modifies the sampling rate parameter to match the actual excitation conditions. The microcontroller calculates optimal sampling rates that maintain high signal-to-noise ratio while avoiding harmonic generation, and updates the sampling clock accordingly.
3Measurement precision
If complex harmonic minimization algorithms are implemented in real-time, then measurement accuracy is improved, but computational complexity and processing time increase
Solution Approach 1:
The patent resolves the computational complexity issue by performing all complex harmonic minimization calculations in advance and storing the results in a lookup table. During actual measurements, the microcontroller simply queries the table for pre-computed optimal sampling instances based on the excitation frequency, avoiding real-time complex calculations entirely. This shifts the computational burden to a one-time setup phase rather than continuous operation.
Solution Approach 2:
The system applies self-service by automatically querying the lookup table and selecting optimal sampling parameters without requiring complex real-time algorithm execution. The pre-computed data structure is designed to allow simple, fast retrieval operations that the microcontroller can perform efficiently, making the system self-sufficient in maintaining measurement accuracy without heavy computational demands during operation.
Data Source
AI summary
A circuit configured to: generate a reference clock signal; generate an excitation signal at a target frequency having a period that is a first integer number of cycles of the reference clock signal; update a driver circuit at an update frequency having a period that is a second integer number of cycles of the reference clock signal; digitize sense signals resulting from the excitation signal at a frequency having a period that is a third integer number of cycles of the reference clock signal; identify a fourth integer number of sense signal samples; optionally utilize an excitation control signal having a period that is a fifth integer number of cycles of the reference clock signal; and minimize harmonics at the target frequency of the excitation signal based on the first integer number, the second integer number, the third integer number, the fourth integer number, and possibly the fifth integer number.