Duty Detector Circuit With Integrated Load Current Balancing
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Solution Overview
Problem
Conventional duty detection/correction circuits face performance deterioration and reduced duty correction capability due to the use of cross-coupled loads and common mode feedback biases, which lead to inconsistent load currents and premature splitting operations, especially when dealing with clock signals with duty cycles other than 50%.
Innovation Solution
A duty detector is designed with a first amplifier and integrator to differential-amplify input signals, a comparator to control the load based on signal comparison with a reference voltage, and an integrator to maintain equal load currents to output terminals, eliminating the need for cross-coupled loads and common mode feedback biases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If cross-coupled loads are used in the duty detector, then the circuit can operate with simpler structure, but the load currents become inconsistent and splitting performance deteriorates
Solution Approach 1:
The patent removes the cross-coupled load configuration from the duty detector circuit and replaces it with separate current sources connected to each amplifier. This extraction of the problematic cross-coupled element eliminates the inconsistency in load currents while maintaining circuit functionality, directly resolving the contradiction between structural simplicity and splitting performance.
Solution Approach 2:
The patent applies different characteristics to different parts of the circuit by using separate current sources for each amplifier instead of a unified cross-coupled load. This allows each side of the differential amplifier to have optimized, consistent load characteristics, improving splitting performance while keeping the overall structure manageable through modular current source design.
2Stability of the object's composition
If common mode feedback bias is used, then the circuit can maintain signal levels, but the duty correction capability is reduced due to premature splitting operations
Solution Approach 1:
The patent implements a feedback mechanism using the capacitor connected between the output terminals of the differential amplifier. This feedback path integrates the difference between the duty detection signal and complementary duty detection signal, providing continuous correction without premature splitting. The feedback maintains signal stability while enabling precise duty cycle correction by continuously adjusting the output based on the integrated error signal.
Solution Approach 2:
The integrator circuit performs preliminary integration of the differential signal before the splitting operation occurs. By pre-integrating the duty cycle error, the circuit prepares the correction signal in advance, preventing premature splitting and ensuring accurate duty correction capability is maintained throughout the operation.
3Ease of manufacture
If the duty detector uses conventional differential charge pump circuit, then the circuit implementation is straightforward, but performance deteriorates due to inconsistent load currents
Solution Approach 1:
The patent changes the load configuration parameter from cross-coupled transistors to separate current sources with specific current values. This parameter change maintains the ease of implementation using standard current source circuits while dramatically improving duty detection performance by ensuring consistent and independent load currents for each amplifier, eliminating the performance deterioration caused by cross-coupled loads.
Data Source
AI summary
A duty detector may include a first amplifier and/or an integrator. The first amplifier may be configured to receive a first signal and a complementary first signal, differential-amplify the first signal and the complementary first signal, and/or output the differential-amplified first signal to an output terminal and the differential-amplified complementary first signal to a complementary output terminal. The integrator may be connected to the output terminal and the complementary output terminal of the first amplifier, configured to integrate the differential-amplified first signal and the differential-amplified complementary first signal, and/or configured to output a duty detection signal.