Dynamic Voltage Frequency Switching DRAM Power Control Circuit
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Solution Overview
Problem
Traditional dynamic voltage and frequency scaling (DVFS) systems in memory devices, such as DRAM, face challenges in supporting power management due to complexity and the need for voltage ramping, which disrupts memory operations and adds cost, while existing DRAM devices operate at low speeds and lack DVFS capabilities.
Innovation Solution
The implementation of a power control circuit with a local power domain logic block that includes low and high voltage power supplies, allowing selective switching between them based on power demand information, such as latency or clock frequency, to enable DVFS capabilities without significant complexity addition, using continuously powered voltage rails and switches to manage power supply to DVFS circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional DVFS is implemented in DRAM, then power management capability is improved, but device complexity and cost significantly increase
Solution Approach 1:
The patent divides the power supply system into multiple independent voltage rails (first voltage rail and second voltage rail) that can be independently controlled. This segmentation allows selective powering of different circuit blocks without requiring complete system voltage changes, thereby reducing complexity while maintaining power management capability.
Solution Approach 2:
The patent implements dynamic voltage switching by enabling the memory device to operate at different clock frequencies with corresponding voltage levels. The controller dynamically selects between voltage rails based on operational requirements, providing adaptability without permanent complexity increases.
2Adaptability or versatility
If voltage ramping is used for DVFS, then power supply switching is achieved, but operational disruptions and switching time increase
Solution Approach 1:
The patent pre-establishes multiple voltage rails that are both capable of providing power to the memory device. By having voltage rails ready in advance rather than generating them dynamically, the system eliminates voltage ramping time and achieves instant voltage switching when frequency changes are required.
3Use of energy by moving object
If DRAM operates at low speeds for majority of applications, then power consumption is reduced, but power efficiency cannot be optimized through DVFS
Solution Approach 1:
The patent creates a universal power supply architecture where multiple voltage rails serve dual purposes: they can individually power the entire memory device or selectively power specific circuit blocks. This multi-functionality enables DVFS capability while maintaining low power consumption during typical operations.
Data Source
AI summary
According to one embodiment, an apparatus is disclosed. The apparatus includes a first power supply having a first fixed voltage, a second power supply having a second fixed voltage, a plurality of circuits coupled to the first power supply via a first switch and the second power supply via a second switch, and a power control circuit configured to selectively enable one of the first switch and the second switch responsive to power demand information.