Dynamic-Bias LDO Regulator for Fast Load Transient Stability
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Solution Overview
Problem
Low dropout (LDO) regulators face challenges in achieving good dynamic performance, stability, and power supply rejection ratio (PSRR) at both low and high load currents, while also dealing with high quiescent current and low current efficiency.
Innovation Solution
The proposed solution involves an LDO regulator design that includes a dynamic biasing circuit controlled by an additional feedback loop to improve load transient response, split biasing circuits to reduce charge pump current, and a load-dependent Miller compensation loop to control the resistance of the Miller compensation resistor based on load current and output voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If LDO regulator uses simple structure with pass element controlled by amplifier, then design simplicity and device size are improved, but dynamic performance and stability at both low and high load current deteriorate
Solution Approach 1:
The regulator is divided into two independent regulator circuits: a first regulator circuit handling low load current conditions and a second regulator circuit handling high load current conditions. Each circuit is optimized for its specific operating range, allowing the system to maintain good dynamic performance across the full load range while keeping each individual circuit relatively simple.
2Device complexity
If LDO regulator uses single regulator circuit, then device complexity is reduced, but ability to maintain performance across varying load conditions deteriorates
Solution Approach 1:
The system dynamically switches between the first regulator circuit and the second regulator circuit based on the detected load current. A switching mechanism monitors the load current and activates the appropriate regulator circuit, enabling the system to adapt its characteristics to match the operating conditions while maintaining manageable device complexity.
3Speed
If LDO regulator uses high bias current, then transient response speed is improved, but quiescent current and power loss increase
Solution Approach 1:
Different bias current levels are applied locally to different regulator circuits based on operating conditions. The first regulator circuit uses a first bias current level optimized for low load conditions, while the second regulator circuit uses a second bias current level optimized for high load conditions. This localized optimization allows fast transient response when needed while minimizing quiescent current during normal operation.
Data Source
AI summary
An integrated circuit includes a first transistor coupled between a power input and a power output, the first transistor being an N-type transistor and having a first transistor control input; a first amplifier stage having a reference input, a feedback input, and a first amplifier output, the feedback input coupled to the power output; a second amplifier stage having an amplifier input and a second amplifier output, the amplifier input coupled to the first amplifier output, and the second amplifier output coupled to the first transistor control input; and a first biasing circuit coupled to the first transistor control input, the first biasing circuit having an electrical control input coupled to the power output.