Dynamic Body Bias Generator for Ultra-Low Voltage CMOS
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In ultra-low voltage digital circuits, the power consumption of additional circuits and logic needed for body bias modulation often exceeds the power reduction benefits, particularly due to high power and area requirements of charge pump circuits for generating bias voltages, which is a challenge in minimizing area and power impact on tiny system-on-chip (SoC) designs.
Innovation Solution
A circuit design that includes a body bias generator circuit using CMOS inverter circuits powered by a power domain with both positive and ground supply voltages, dynamically switching between forward and reverse body bias voltages based on control signals to optimize transistor operation modes, thereby reducing the need for separate charge pump circuits and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If charge pump circuits are used to generate bias voltages for body bias modulation, then forward and reverse body bias can be achieved to optimize power-speed tradeoff, but power consumption and area requirements increase significantly
Solution Approach 1:
The body bias modulation is achieved using the existing power domain supply voltages (VDD and VSS) without requiring external charge pump circuits. The n-body and p-body bias nodes directly receive supply voltages that naturally provide the necessary bias conditions, making the system self-sufficient and eliminating additional power-consuming components.
Solution Approach 2:
The power domain supply voltages serve dual purposes: they power the digital circuit operation and simultaneously provide the body bias voltages for transistor optimization. This multi-functionality eliminates the need for dedicated charge pump circuits, reducing both power consumption and area.
2Adaptability or versatility
If charge pump circuits are used to generate bias voltages for body bias modulation, then forward and reverse body bias can be achieved to optimize power-speed tradeoff, but area requirements increase significantly
Solution Approach 1:
The body bias modulation is achieved using the existing power domain supply voltages (VDD and VSS) without requiring external charge pump circuits. The n-body and p-body bias nodes directly receive supply voltages that naturally provide the necessary bias conditions, making the system self-sufficient and eliminating additional power-consuming components.
Solution Approach 2:
The power domain supply voltages serve dual purposes: they power the digital circuit operation and simultaneously provide the body bias voltages for transistor optimization. This multi-functionality eliminates the need for dedicated charge pump circuits, reducing both power consumption and area.
3Speed
If forward body bias is applied to decrease threshold voltage for faster operation, then switching speed improves, but current leakage increases
Solution Approach 1:
The body bias configuration is made dynamic by providing separate control mechanisms for n-body and p-body bias nodes. This allows the circuit to switch between different bias states (forward, reverse, or zero bias) depending on operational requirements, enabling adaptive optimization of speed-leakage tradeoff.
Solution Approach 2:
The threshold voltage parameter is made adjustable through dynamic body bias control. By changing the bias voltage applied to transistor bodies, the threshold voltage can be modulated to achieve desired switching speed while controlling leakage current based on operational mode.
4Loss of energy
If reverse body bias is applied to reduce current leakage in sleep mode, then power consumption decreases, but switching speed reduces
Solution Approach 1:
The body bias configuration is made dynamic by providing separate control mechanisms for n-body and p-body bias nodes. This allows the circuit to switch between different bias states (forward, reverse, or zero bias) depending on operational requirements, enabling adaptive optimization of speed-leakage tradeoff.
Solution Approach 2:
The threshold voltage parameter is made adjustable through dynamic body bias control. By changing the bias voltage applied to transistor bodies, the threshold voltage can be modulated to achieve desired switching speed while controlling leakage current based on operational mode.
Data Source
AI summary
A digital circuit includes logic circuitry formed by logic gates. Each logic gate includes a p-channel MOSFET and an n-channel MOSFET. A body bias generator circuit applies an n-body bias voltage to the n-body bias nodes of the p-channel MOSFETs and applies a p-body bias voltage to the p-body bias nodes of the n-channel MOSFETs. The body bias generator circuit operates in: a first mode to apply a ground supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply a positive supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage; and a second mode to apply the positive supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply the ground supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage.


