Dynamic Cascode Biasing in Class AB Amplifiers for Noise Immunity

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Solution Overview

Problem

Class AB amplifiers used in CMOS integrated circuit designs face limitations in maximum gain and are sensitive to power supply noise, which can affect signal quality in digital imaging circuits due to low signal levels.

Innovation Solution

The integration of cascode transistors in the output stage, dynamically biased by differential amplifier stages and current sum branches, enhances open-loop gain and noise immunity by providing a stable voltage signal across the power supply terminals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If class AB amplifier is used in CMOS integrated circuit designs, then it can provide large current during signal transition periods and small current during steady state operation, but the maximum gain is limited and the amplifier output is sensitive to power supply noise

Engineering Contradiction:
Improvecurrent output capabilityVSAvoidnoise sensitivity and gain limitation
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The output stage is segmented into multiple transistor stages (first output transistor, second output transistor, third output transistor, fourth output transistor) arranged in a push-pull configuration. This segmentation allows each transistor to handle specific portions of the signal waveform, enabling high current output capability during transitions while maintaining stability and reducing noise sensitivity through the distributed structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention dynamically changes the operating parameters of the output transistors through differential amplifier stages that control gate voltages. The differential amplifiers adjust the bias conditions and operating points of the output transistors based on input signal conditions, enabling the amplifier to maintain high gain while adapting current output levels to reduce noise sensitivity during steady-state operation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If differential amplifier stages and current sum branches are used to control output transistors, then gate control signals can be developed, but device complexity increases

Engineering Contradiction:
Improveamplifier control precisionVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The differential amplifier stages and current sum branches are merged into an integrated control structure where multiple functions are combined in shared circuit elements. The current sum branches serve dual purposes of biasing the output transistors and providing feedback control, while the differential amplifiers simultaneously perform signal differentiation and gain control, reducing overall device complexity despite enhanced control precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control circuit elements are designed with multi-functionality: the differential amplifier stages not only control gate voltages but also provide impedance matching and signal buffering; the current sum branches simultaneously establish bias currents and provide feedback for stability control. This universality reduces the number of dedicated components needed, managing device complexity while maintaining precise amplifier control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7920024B2Apparatus and methods providing dynamic biasing of cascode transistors in class AB amplifiers
Publication Date: 2011.04.05 APTINA IMAGING CORP
  • US7920024B2 patent drawing
  • US7920024B2 patent drawing
  • US7920024B2 patent drawing

AI summary

An amplifier and method of fabricating and operating it are disclosed in which dynamically biased cascode transistors are provided in an output stage along with output transistors which are dynamically biased by differential control circuits to provide an output signal.