Television System Details TRIZ Cases

Using oxide semiconductor transistors in CMOS pixel circuits suppresses off-state current and charge leakage during global shutter readout.

Transmitting compact index values instead of full pixel data cuts wireless x-ray detector image transfer time while preserving reconstruction quality.

A first control device blocks selected infrared commands and lowers TV speaker output to simplify remote use and prevent mixed-speaker audio degradation.

On-demand offset synthesis increases LC-VCO frequency spacing in bonded-channel receivers, reducing pulling and preserving reception quality.

Cross-coupled capacitors and programmable gain stages help a wideband TV receiver LNA keep linear gain and dynamic range with fewer external parts.

Neighbor-based search range estimation cuts motion vector computation while preserving reliable real-time encoding for high-definition video.

A dual DAC splits signal generation and gain control to precisely tune reference signal slope for more accurate single-slope AD conversion.

Conditional multiplication applies gain correction before loop delay expires, reducing feedback latency and stabilizing high-speed data processing.

Adaptive storage of compressed or reconstructed reference-frame blocks cuts codec memory and data access while preserving video quality.

Adaptive image rejection and interval-based power gating cut analog video receiver power while preserving tuner performance in portable devices.

Buffered signal replicas distribute broadband inputs across multiple ICs without splitter loss, preserving SNR, impedance, and power balance.

Dynamic biasing of cascode transistors boosts class AB amplifier gain and power-supply noise immunity for low-level imaging signals.

A passive RC polyphase filter forms the TV Nyquist slope in one common design, reducing multiple SAW filters for analog and digital reception.

Independent RF and IF gain controllers remove manual AGC alignment, cutting receiver production time, cost, and calibration risk.

A second-order high-pass input filter pre-corrects output sag, enabling smaller chip capacitors and fewer external parts.

Adjustable FIR taps and CIC decimation let one TV audio chain handle NICAM, FM-Stereo, and other broadcast standards.

Pre-filtering unwanted channels on-chip cuts tuner intermodulation and harmonic distortion while preserving gain programmability and lowering power use.

Phase-error thresholds let a PLL auto-select gain for faster lock on unstable video signals while reducing jitter and false tracking.

An arbiter shares inverse quantization, IDCT, and motion compensation across two HD MPEG channels to cut chip size and keep display timing regular.

A negative gate bias cuts storage-node leakage in global shutter pixels, improving row uniformity, fill factor, and low-light imaging.

Built-in storage-based mapping conversion switches SMPTE 425M Level A and B SDI formats without external FPGA cost or complexity.

A hybrid robust and normal stream with convolutional, RS, and trellis coding improves ATSC VSB reception in poor multipath channels.

Active clamp and level-shift stages hold sink chip voltage without external capacitors, enabling direct connection and smaller image input circuits.

A wobble frequency conversion circuit lets one PLL handle DVD-R/RW and DVD+RW/+R recording, reducing circuit scale while preserving sync protection.

Dual integral and fractional phase-error detection improves DLL locking precision and suppresses jitter for high-resolution pixel clocks.

Coarse and fine AGC tuning resets amplifier gain from signal power and quality indicators to speed DVB receiver acquisition and reduce interference.

Phase-locked clocking and carrier noise cancellation suppress RFID reader leakage, improving weak backscatter signal quality in dense environments.

Lookup tables and arithmetic offset calculation cut deinterleaver RAM, flip-flops, and power in ISDB-T OFDM receivers.

Using a MOS transistor in sub-threshold operation replaces large RC resistors, cutting bias-noise filtering area while preserving high impedance.

LSB dithering breaks up SMPTE 259M pathological patterns to reduce optical waveform distortion and bit errors in digital video links.

Partial-parameter encoding with pilot and difference values improves audio transmission efficiency while preserving high-quality decoding.

Selectable analog ramp signals replace per-column gain amplifiers, cutting CMOS sensor ADC area and power while improving gain accuracy.

Pilot reference values, differential coding, and entropy coding are combined to raise audio transmission efficiency without excessive coding overhead.

Multi-stage frequency division with dynamic phase tuning improves HDMI audio clock accuracy and noise immunity under large N and CTS values.

Parallel band-pass filtering and demodulation let one RF-to-digital receiver handle multiple multiplexed channels with less switching delay.

A null-packet detector uses fixed-pattern matching and hysteretic filtering to stop false MPEG-2 sync locks and preserve correct transport delivery.

Multiple exposure readout selects non-saturated pixel signals and normalizes them to extend dynamic range without extra HDR hardware.

Phase-specific feedback shortens the reset path in a switched-capacitor amplifier, improving stability and bandwidth without extra compensation circuits.

A switched-capacitor A/D circuit reuses the operational amplifier for amplification and conversion, cutting CMOS sensor area while improving SNR.

By tracking the strongest ambient light interference before demodulation, this case sets a harmonic carrier frequency to improve SpO2 signal accuracy.

Two independent count clocks cut AD conversion power while lower-bit compensation preserves higher-bit accuracy in image sensor readout.

Format verification using horizontal and vertical sync frequencies powers down video/audio processing when TMDS input is undecodable.

An in-panel photo sensor circuit uses transistors, a photodiode, and capacitors to stabilize ambient-light sensing and cut flat panel power use.

An integrated active splitter with autonomous AGC offsets passive splitter loss, preserving cable tuner signal range, SNR, and linearity.

Balanced binary encoding keeps 0/1 ratios near equal on parallel interconnects to cut power supply noise and improve signal integrity.

By accumulating charge from detected voltage differences, this circuit suppresses signal noise without costly external frame memories.

EDC-guided optical disc processing skips clean data and varies PI/PO correction repeats to preserve throughput while handling random errors.

A driver chip with a band gap voltage circuit powers the logic chip inside one package, cutting separate supply circuitry, size, and cost.

Balanced 0/1 codewords on parallel buses cut power supply noise, improve signal integrity, and support built-in error detection.

Complex-baseband conjugate filtering improves image rejection in low-power silicon video receivers without sacrificing portable use.